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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: rYyHcZDJZjqcmbipWC_9ZMCTe-melRmF X-Proofpoint-Spam-Info: AW1haW4tMjYwNzA2MDEzMiBTYWx0ZWRfX/Q8AN0KjnrnR G7pVr7maVLiMuad2VicRMx3klRUVpRN5lIV1Qa8Y1uVoq4zA74NBPHikl/6BGoRhBqYQ0paRH7i 8oU5CXKJxSUG9cn+mpCqwKTlqD8s1Z0= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzA2MDEzMiBTYWx0ZWRfX4Nxr6JNNYKad rWHR6aKdb+nvbcDSI7GnTyFvRNYHDtX1S2nJTOQ1EqkBYSvpN1m5lKvr9gY2RFEKq6tBc3ZOACK bKZD/JSVFMQjG+Hz9dj/6ZavvMsC3OBPAMOc8OW5Mm76GQBNNvtK1zRIkUE3CH5orSql6DMOKJV Ox8uahID/0YZxMKCDf9py8L59S+GKpUR/Lsj+xhT3nnc5A9KT3D/lgCYpwbK5VEAxQkXvRfyu3P K8qqlPweAmYCHyFEJgVnN5my3MPHaU0bO8lNWnkcZeABS2HAaVJwj20tepkm0EoVShkwnsDHyqS X0JBWgwS9Em2PdnS/BK5ZhmLWcyoGA8gHUkeFyxVNkdXMtYdWAR8edqrXTPatgj89fEUGZyxHnb NVRE3AwFyUKi1cf7nqIQMLG0i0pHXvYdR45NqBfgV3G2+iDloaSg+GvZPFJIrEc87IUznDfYaFk pIapiZpE8+67qaNpgrw== X-Proofpoint-GUID: rYyHcZDJZjqcmbipWC_9ZMCTe-melRmF X-Authority-Analysis: v=2.4 cv=GulyPE1C c=1 sm=1 tr=0 ts=6a4ba69f cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=VXLAdwoOgdXhmVkI5jAA:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-06_01,2026-07-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 adultscore=0 clxscore=1015 malwarescore=0 impostorscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607060132 On 7/6/26 8:04 AM, Nabige Aala wrote: > Add the SoC-level display subsystem nodes for Qualcomm Shikra: > MDSS wrapper,DPU display controller, DSI host controller, and > 14nm DSI PHY. > > Qualcomm Shikra uses DPU 6.5 hardware (same as QCM2290). Platform-specific > compatible strings are used as the primary match with QCM2290 fallbacks > to reuse the existing driver support. > > The dispcc clock inputs for the DSI byte and pixel PLLs are wired > from mdss_dsi0_phy. > > Signed-off-by: Nabige Aala > --- [...] > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + dpu_intf1_out: endpoint { Please keep a \n between the last property and the following subnodes otherwise lgtm Reviewed-by: Konrad Dybcio Konrad