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From: Suzuki K Poulose <suzuki.poulose@arm.com>
To: James Clark <james.clark@arm.com>,
	linux-perf-users@vger.kernel.org,
	gankulkarni@os.amperecomputing.com,
	scclevenger@os.amperecomputing.com, coresight@lists.linaro.org,
	mike.leach@linaro.org
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>,
	Alexandre Torgue <alexandre.torgue@foss.st.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Ingo Molnar <mingo@redhat.com>,
	Arnaldo Carvalho de Melo <acme@kernel.org>,
	Namhyung Kim <namhyung@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>, Jiri Olsa <jolsa@kernel.org>,
	Ian Rogers <irogers@google.com>,
	Adrian Hunter <adrian.hunter@intel.com>,
	John Garry <john.g.garry@oracle.com>,
	Will Deacon <will@kernel.org>, Leo Yan <leo.yan@linux.dev>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH 14/17] coresight: Use per-sink trace ID maps for Perf sessions
Date: Tue, 7 May 2024 11:52:34 +0100	[thread overview]
Message-ID: <3923dc07-c037-452a-9e77-d407703876cd@arm.com> (raw)
In-Reply-To: <20240429152207.479221-16-james.clark@arm.com>

On 29/04/2024 16:22, James Clark wrote:
> This will allow sessions with more than CORESIGHT_TRACE_IDS_MAX ETMs
> as long as there are fewer than that many ETMs connected to each sink.
> 
> Each sink owns its own trace ID map, and any Perf session connecting to
> that sink will allocate from it, even if the sink is currently in use by
> other users. This is similar to the existing behavior where the dynamic
> trace IDs are constant as long as there is any concurrent Perf session
> active. It's not completely optimal because slightly more IDs will be
> used than necessary, but the optimal solution involves tracking the PIDs
> of each session and allocating ID maps based on the session owner. This
> is difficult to do with the combination of per-thread and per-cpu modes
> and some scheduling issues. The complexity of this isn't likely to worth
> it because even with multiple users they'd just see a difference in the
> ordering of ID allocations rather than hitting any limits (unless the
> hardware does have too many ETMs connected to one sink).
> 
> Signed-off-by: James Clark <james.clark@arm.com>
> ---
>   drivers/hwtracing/coresight/coresight-core.c     | 10 ++++++++++
>   drivers/hwtracing/coresight/coresight-etm-perf.c | 15 ++++++++-------
>   include/linux/coresight.h                        |  1 +
>   3 files changed, 19 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtracing/coresight/coresight-core.c
> index 9fc6f6b863e0..d1adff467670 100644
> --- a/drivers/hwtracing/coresight/coresight-core.c
> +++ b/drivers/hwtracing/coresight/coresight-core.c
> @@ -902,6 +902,7 @@ static void coresight_device_release(struct device *dev)
>   	struct coresight_device *csdev = to_coresight_device(dev);
>   
>   	fwnode_handle_put(csdev->dev.fwnode);
> +	free_percpu(csdev->perf_id_map.cpu_map);
>   	kfree(csdev);
>   }
>   
> @@ -1159,6 +1160,14 @@ struct coresight_device *coresight_register(struct coresight_desc *desc)
>   	csdev->dev.fwnode = fwnode_handle_get(dev_fwnode(desc->dev));
>   	dev_set_name(&csdev->dev, "%s", desc->name);
>   
> +	if (csdev->type == CORESIGHT_DEV_TYPE_SINK ||
> +	    csdev->type == CORESIGHT_DEV_TYPE_LINKSINK) {
> +		csdev->perf_id_map.cpu_map = alloc_percpu(atomic_t);
> +		if (!csdev->perf_id_map.cpu_map) {
> +			ret = -ENOMEM;
> +			goto err_out;
> +		}
> +	}
>   	/*
>   	 * Make sure the device registration and the connection fixup
>   	 * are synchronised, so that we don't see uninitialised devices
> @@ -1216,6 +1225,7 @@ struct coresight_device *coresight_register(struct coresight_desc *desc)
>   err_out:
>   	/* Cleanup the connection information */
>   	coresight_release_platform_data(NULL, desc->dev, desc->pdata);
> +	kfree(csdev);
>   	return ERR_PTR(ret);
>   }
>   EXPORT_SYMBOL_GPL(coresight_register);
> diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c
> index 177cecae38d9..86ca1a9d09a7 100644
> --- a/drivers/hwtracing/coresight/coresight-etm-perf.c
> +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c
> @@ -229,10 +229,13 @@ static void free_event_data(struct work_struct *work)
>   		struct list_head **ppath;
>   
>   		ppath = etm_event_cpu_path_ptr(event_data, cpu);
> -		if (!(IS_ERR_OR_NULL(*ppath)))
> +		if (!(IS_ERR_OR_NULL(*ppath))) {
> +			struct coresight_device *sink = coresight_get_sink(*ppath);
> +
> +			coresight_trace_id_put_cpu_id(cpu, &sink->perf_id_map);
>   			coresight_release_path(*ppath);
> +		}
>   		*ppath = NULL;
> -		coresight_trace_id_put_cpu_id(cpu, coresight_trace_id_map_default());
>   	}
>   
>   	/* mark perf event as done for trace id allocator */
> @@ -401,8 +404,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages,
>   		}
>   
>   		/* ensure we can allocate a trace ID for this CPU */
> -		trace_id = coresight_trace_id_get_cpu_id(cpu,
> -							 coresight_trace_id_map_default());
> +		trace_id = coresight_trace_id_get_cpu_id(cpu, &sink->perf_id_map);

We could either store the perf_id_map or the traceid itself in the 
event_data isn't it ? Rather than passing the idmap to enable_source ?

Suzuki

  parent reply	other threads:[~2024-05-07 10:52 UTC|newest]

Thread overview: 51+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-04-29 15:21 [PATCH 00/17] " James Clark
2024-04-29 15:21 ` [PATCH 01/17] perf cs-etm: Print error for new PERF_RECORD_AUX_OUTPUT_HW_ID versions James Clark
2024-05-07  3:47   ` Anshuman Khandual
2024-05-07 10:06     ` James Clark
2024-05-07 10:57       ` Anshuman Khandual
2024-05-07 14:54         ` Arnaldo Carvalho de Melo
2024-04-29 15:21 ` [PATCH 02/17] perf auxtrace: Allow number of queues to be specified James Clark
2024-04-30  6:36   ` Adrian Hunter
2024-05-07  4:26   ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 03/17] perf: cs-etm: Create decoders after both AUX and HW_ID search passes James Clark
2024-04-29 15:21 ` [PATCH 04/17] perf: cs-etm: Allocate queues for all CPUs James Clark
2024-04-29 15:21 ` [PATCH 05/17] perf: cs-etm: Move traceid_list to each queue James Clark
2024-04-29 15:21 ` [PATCH 06/17] perf: cs-etm: Create decoders based on the trace ID mappings James Clark
2024-04-29 15:21 ` [PATCH 07/17] perf: cs-etm: Support version 0.1 of HW_ID packets James Clark
2024-04-29 15:21 ` [PATCH 08/17] coresight: Remove unused stubs James Clark
2024-05-01 11:06   ` Mike Leach
2024-05-07  4:15   ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 09/17] coresight: Clarify comments around the PID of the sink owner James Clark
2024-05-01 11:07   ` Mike Leach
2024-05-07  4:25   ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 10/17] coresight: Move struct coresight_trace_id_map to common header James Clark
2024-05-01 11:11   ` Mike Leach
2024-05-07  5:50   ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 11/17] coresight: Expose map argument in trace ID API James Clark
2024-05-01 10:31   ` Mike Leach
2024-05-17 10:09     ` James Clark
2024-05-07  6:00   ` Anshuman Khandual
2024-04-29 15:21 ` [PATCH 11/17] coresight: Expose map arugment " James Clark
2024-04-29 15:30   ` James Clark
2024-04-29 15:21 ` [PATCH 12/17] coresight: Make CPU id map a property of a trace ID map James Clark
2024-05-07  6:22   ` Anshuman Khandual
2024-05-07  9:57     ` James Clark
2024-04-29 15:21 ` [PATCH 13/17] coresight: Pass trace ID map into source enable James Clark
2024-05-07  6:46   ` Anshuman Khandual
2024-05-07 10:49   ` Suzuki K Poulose
2024-04-29 15:22 ` [PATCH 14/17] coresight: Use per-sink trace ID maps for Perf sessions James Clark
2024-05-03  9:43   ` Mike Leach
2024-05-03 14:31     ` James Clark
2024-05-07 10:52   ` Suzuki K Poulose [this message]
2024-05-17 10:07     ` James Clark
2024-04-29 15:22 ` [PATCH 15/17] coresight: Remove pending trace ID release mechanism James Clark
2024-04-29 15:22 ` [PATCH 16/17] coresight: Re-emit trace IDs when the sink changes in per-thread mode James Clark
2024-05-07 11:05   ` Suzuki K Poulose
2024-05-17 10:01     ` James Clark
2024-04-29 15:22 ` [PATCH 17/17] coresight: Emit HW_IDs for all ETMs that are using the sink James Clark
2024-05-03 12:40 ` [PATCH 00/17] coresight: Use per-sink trace ID maps for Perf sessions Mike Leach
2024-05-17 10:45   ` James Clark
2024-05-03 20:23 ` Arnaldo Carvalho de Melo
2024-05-07 10:01   ` James Clark
2024-05-07 14:59     ` Arnaldo Carvalho de Melo
2024-05-07 11:02 ` Ganapatrao Kulkarni

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