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([2001:b07:6468:f312:c8dd:75d4:99ab:290a]) by smtp.gmail.com with ESMTPSA id m2sm3520973wmm.3.2021.09.21.10.35.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 21 Sep 2021 10:35:59 -0700 (PDT) Subject: Re: [PATCH v2 02/10] KVM: x86: Clear KVM's cached guest CR3 at RESET/INIT To: Sean Christopherson Cc: Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Reiji Watanabe References: <20210921000303.400537-1-seanjc@google.com> <20210921000303.400537-3-seanjc@google.com> From: Paolo Bonzini Message-ID: <395d8222-9168-8568-255e-da57c2ac8b5b@redhat.com> Date: Tue, 21 Sep 2021 19:35:56 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: <20210921000303.400537-3-seanjc@google.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 21/09/21 02:02, Sean Christopherson wrote: > Explicitly zero the guest's CR3 and mark it available+dirty at RESET/INIT. > Per Intel's SDM and AMD's APM, CR3 is zeroed at both RESET and INIT. For > RESET, this is a nop as vcpu is zero-allocated. For INIT, the bug has > likely escaped notice because no firmware/kernel puts its page tables root > at PA=0, let alone relies on INIT to get the desired CR3 for such page > tables. > > Cc: stable@vger.kernel.org > Signed-off-by: Sean Christopherson > --- > arch/x86/kvm/x86.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index e77a5bf2d940..2cb38c67ed43 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -10899,6 +10899,9 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event) > kvm_set_rflags(vcpu, X86_EFLAGS_FIXED); > kvm_rip_write(vcpu, 0xfff0); > > + vcpu->arch.cr3 = 0; > + kvm_register_mark_dirty(vcpu, VCPU_EXREG_CR3); > + > /* > * CR0.CD/NW are set on RESET, preserved on INIT. Note, some versions > * of Intel's SDM list CD/NW as being set on INIT, but they contradict > Queued patches 1-2 for 5.15-rc3, thanks. Paolo