From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753325AbdEQGr7 (ORCPT ); Wed, 17 May 2017 02:47:59 -0400 Received: from m50-134.163.com ([123.125.50.134]:46508 "EHLO m50-134.163.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752596AbdEQGr5 (ORCPT ); Wed, 17 May 2017 02:47:57 -0400 Subject: Re: [PATCH 2/3] arm: dts: rk322x: correct uart2 pinctrl and add another sets To: Frank Wang , heiko@sntech.de, robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk References: <1494992451-32542-1-git-send-email-frank.wang@rock-chips.com> <1494992451-32542-3-git-send-email-frank.wang@rock-chips.com> Cc: huangtao@rock-chips.com, devicetree@vger.kernel.org, charles.chen@rock-chips.com, wmc@rock-chips.com, kevan.lan@rock-chips.com, linux-kernel@vger.kernel.org, sugar.zhang@rock-chips.com, linux-rockchip@lists.infradead.org, cody.xie@rock-chips.com, linux-arm-kernel@lists.infradead.org From: Kever Yang Message-ID: <3974d438-89ca-04e2-03cd-6d3946dd461e@163.com> Date: Wed, 17 May 2017 14:31:44 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.8.0 MIME-Version: 1.0 In-Reply-To: <1494992451-32542-3-git-send-email-frank.wang@rock-chips.com> Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit X-CM-TRANSID: DtGowADnE6FQ7htZEhk_AA--.7203S2 X-Coremail-Antispam: 1Uf129KBjvJXoW7Ary3Kw1fZw4fAr43GFW3ZFb_yoW8GF1kpr s3C39Igrn7KF4Sga4qqw1DJrs8Kw4kWa1kurn3Xry8Wry3WayxJFyfKr9xKF1xWr4fA340 vrs3Wry3Cw4qqFDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jiCztUUUUU= X-Originating-IP: [103.29.142.67] X-CM-SenderInfo: 5hoox2l1v6il2tof0z/1tbiMhTaDlWBW2vSXwAAsb Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Frank, On 05/17/2017 11:40 AM, Frank Wang wrote: > Correct UART2 PINCTRL flag and add another PINCTRL sets for UART2 > in case of confict with SDMMC. > > Signed-off-by: Frank Wang > --- > arch/arm/boot/dts/rk322x.dtsi | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi > index cc6a27d..ea1239a 100644 > --- a/arch/arm/boot/dts/rk322x.dtsi > +++ b/arch/arm/boot/dts/rk322x.dtsi > @@ -222,7 +222,7 @@ > clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>; > clock-names = "baudclk", "apb_pclk"; > pinctrl-names = "default"; > - pinctrl-0 = <&uart2_xfer>; > + pinctrl-0 = <&uart21_xfer>; There are more than one group of UART in rk322x, maybe we need to move or add this setting in the dts file to override dtsi setting? Thanks, - Kever > reg-shift = <2>; > reg-io-width = <4>; > status = "disabled"; > @@ -693,7 +693,7 @@ > > uart2 { > uart2_xfer: uart2-xfer { > - rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_none>, > + rockchip,pins = <1 18 RK_FUNC_2 &pcfg_pull_up>, > <1 19 RK_FUNC_2 &pcfg_pull_none>; > }; > > @@ -705,5 +705,12 @@ > rockchip,pins = <0 24 RK_FUNC_1 &pcfg_pull_none>; > }; > }; > + > + uart2-1 { > + uart21_xfer: uart21-xfer { > + rockchip,pins = <1 10 RK_FUNC_2 &pcfg_pull_up>, > + <1 9 RK_FUNC_2 &pcfg_pull_none>; > + }; > + }; > }; > };