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Tue, 28 Jul 2026 11:10:25 -0700 (PDT) Content-Type: multipart/signed; boundary="Apple-Mail=_74B8EE53-C8E5-442D-8CD5-A08FCBF83C61"; protocol="application/pgp-signature"; micalg=pgp-sha256 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3864.600.51.1.1\)) Subject: Re: [PATCH v8 01/12] dt-bindings: clk: zte: Add zx297520v3 top clock and reset controller From: =?utf-8?Q?Stefan_D=C3=B6singer?= In-Reply-To: <20260728-proficient-boobook-of-will-2cc94a@quoll> Date: Tue, 28 Jul 2026 21:10:03 +0300 Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel , Brian Masney , Vinod Koul , Neil Armstrong , Russell King , Lee Jones , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, mfd@lists.linux.dev Message-Id: <3A3A0D17-7A80-40FE-AB89-DDE8E9A7F72B@gmail.com> References: <20260727-zx29clk-v8-0-7a107b00f1dd@gmail.com> <20260727-zx29clk-v8-1-7a107b00f1dd@gmail.com> <20260728-proficient-boobook-of-will-2cc94a@quoll> To: Krzysztof Kozlowski X-Mailer: Apple Mail (2.3864.600.51.1.1) --Apple-Mail=_74B8EE53-C8E5-442D-8CD5-A08FCBF83C61 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=us-ascii Hi Krzysztof, Thanks for the prompt review! > Am 28.07.2026 um 09:27 schrieb Krzysztof Kozlowski : >=20 >>=20 >> + resets: >> + items: >> + - description: USB phy reset >> + - description: HSIC phy reset >> + >> + reset-names: >> + items: >> + - const: usb >> + - const: hsic >=20 > You do not need these two. It's one device and DT does not represent > internal device wirings because they are redundant (deducible from the > compatible). Just to make sure I understand the implications: Remove the PHY resets = from the reset header (and driver) and have the PHY driver control them = directly via regmap instead of going through its reset sibling? That way = no self-consumption is necessary. At least that's the idea Sashiko put = into my head with "Could the driver interact with its own registers = directly?". The PHY driver would take exclusive ownership of the resets anyhow, so I = don't see anything in the way of just making it own the respective bits = in the 0x80 register through the shared regmap. >> +required: >> + - compatible >> + - reg >> + - clocks >> + - clock-names >> + - interrupts >> + - interrupt-names >> + - resets >> + - reset-names >> + - syscon-reboot >> + - "#clock-cells" >> + - "#phy-cells" >> + - "#reset-cells" >> + >> +unevaluatedProperties: false >=20 > This was different last time and previous code was correct. Ok, I'll keep #phy-cells and ints optional and also make it possible to = provide only USB or HSIC ints. --Apple-Mail=_74B8EE53-C8E5-442D-8CD5-A08FCBF83C61 Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename=signature.asc Content-Type: application/pgp-signature; name=signature.asc Content-Description: Message signed with OpenPGP -----BEGIN PGP SIGNATURE----- iQIzBAEBCAAdFiEEQxb0tqoFWyeVMl1sPRO8yFRPGiIFAmpo8HsACgkQPRO8yFRP GiLPTA//VT+BJ+4K6QWEatqxIi67Rfy+A3mhALsMoPStAPoN8KELPVr+JoqLoFD8 lz9s0uj1PXWN1CmBArx6Hzm1N35owUoP46VLnwqrIAR0gaor+PQPHJ9In5L6E6Lm SdUs0QfxWMV75E2IM1tTRf8MKa6SnCvEp72OAYdMgRzEd7f0vp9fV9716yb0Ej7q ZXG85U4f/1++S5XHoPxqFxrxunsJoX4GgVEmKyeB9N3spWjS7KykKo2UYFZEctFg RUiai7lO1I2X9DuFGkuVZcouCIcpB1eJHx7r3UOTwIG6kbTKHBjWoq32L2tjUY4B nSkU7vMfwUA387n/zdeisN6smcf0C8uH3g8PSozuzaojYQzAr5MjbmgDue2R1LQi wVfHBdREUJL1WHt25UgiE5EcBcrQhwxccqDuWbkXH9toxP0HUEpTn9gdB8yNdGQx HSLsQCaqOew5/9nPEnwn0X7q7FnnBSOYv6AQ5g96xPeuNDNQ2n8f80X8iBmy3qup tWM+cCViEhEkoLl0x+/XTO6vfljHztZCpv2Xey9PGs7HDtyJbBMTkcHdcCTFV9yo RKzQMdJgqmIfycOlUGL+eHCI1X9SGEZc7hcENPBn666TnnWf3XrsCKZNHFBCU85e HUylGFuzN2pdc1MzYxgwFIJhKLtsVV8pLrnR3WfCD/2F6XYb36g= =Oh+I -----END PGP SIGNATURE----- --Apple-Mail=_74B8EE53-C8E5-442D-8CD5-A08FCBF83C61--