x86info v1.3. Dave Jones 2001 Feedback to . Found 2 CPUs eax in: 0, eax = 00000002 ebx = 756e6547 ecx = 6c65746e edx = 49656e69 eax in: 1, eax = 00000686 ebx = 00000002 ecx = 00000000 edx = 0383fbff eax in: 2, eax = 03020101 ebx = 00000000 ecx = 00000000 edx = 0c040882 Vendor ID: "GenuineIntel"; Max CPUID level 2 Intel-specific functions Family: 6 Model: 8 Type 0 [Celeron / Pentium III (Coppermine) Original OEM] Stepping: 6 Reserved: 0 Feature flags 0383fbff: FPU Floating Point Unit VME Virtual 8086 Mode Enhancements DE Debugging Extensions PSE Page Size Extensions TSC Time Stamp Counter MSR Model Specific Registers PAE Physical Address Extension MCE Machine Check Exception CX8 COMPXCHG8B Instruction APIC On-chip Advanced Programmable Interrupt Controller present and enabled SEP Fast System Call MTRR Memory Type Range Registers PGE PTE Global Flag MCA Machine Check Architecture CMOV Conditional Move and Compare Instructions FGPAT Page Attribute Table PSE-36 36-bit Page Size Extension MMX MMX instruction set FXSR Fast FP/MMX Streaming SIMD Extensions save/restore XMM Streaming SIMD Extensions instruction set Instruction TLB: 4KB pages, 4-way set assoc, 32 entries Instruction TLB: 4MB pages, fully assoc, 2 entries Data TLB: 4KB pages, 4-way set assoc, 64 entries L2 unified cache: Sectored, 32 byte cache line, 8 way set associative, 256K Instruction cache: 16KB, 4-way set assoc, 32 byte line size Data TLB: 4MB pages, 4-way set assoc, 8 entries Data cache: 16KB, 2-way or 4-way set assoc, 32 byte line size Erk, MCG_CTL not present! eax in: 0, eax = 00000002 ebx = 756e6547 ecx = 6c65746e edx = 49656e69 eax in: 1, eax = 00000686 ebx = 00000002 ecx = 00000000 edx = 0383fbff eax in: 2, eax = 03020101 ebx = 00000000 ecx = 00000000 edx = 0c040882 Vendor ID: "GenuineIntel"; Max CPUID level 2 Intel-specific functions Family: 6 Model: 8 Type 0 [Celeron / Pentium III (Coppermine) Original OEM] Stepping: 6 Reserved: 0 Feature flags 0383fbff: FPU Floating Point Unit VME Virtual 8086 Mode Enhancements DE Debugging Extensions PSE Page Size Extensions TSC Time Stamp Counter MSR Model Specific Registers PAE Physical Address Extension MCE Machine Check Exception CX8 COMPXCHG8B Instruction APIC On-chip Advanced Programmable Interrupt Controller present and enabled SEP Fast System Call MTRR Memory Type Range Registers PGE PTE Global Flag MCA Machine Check Architecture CMOV Conditional Move and Compare Instructions FGPAT Page Attribute Table PSE-36 36-bit Page Size Extension MMX MMX instruction set FXSR Fast FP/MMX Streaming SIMD Extensions save/restore XMM Streaming SIMD Extensions instruction set Instruction TLB: 4KB pages, 4-way set assoc, 32 entries Instruction TLB: 4MB pages, fully assoc, 2 entries Data TLB: 4KB pages, 4-way set assoc, 64 entries L2 unified cache: Sectored, 32 byte cache line, 8 way set associative, 256K Instruction cache: 16KB, 4-way set assoc, 32 byte line size Data TLB: 4MB pages, 4-way set assoc, 8 entries Data cache: 16KB, 2-way or 4-way set assoc, 32 byte line size Erk, MCG_CTL not present! 999MHz processor (estimate).