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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ae6e7c09dfdsm1407562266b.0.2025.07.17.13.10.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 17 Jul 2025 13:10:09 -0700 (PDT) Message-ID: <3a381014-cfe4-4b3c-a3c7-df688c1e87cc@oss.qualcomm.com> Date: Thu, 17 Jul 2025 22:10:05 +0200 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/4] arm64: dts: qcom: Add HAMOA-IOT-SOM platform To: Stephan Gerhold , Yijie Yang Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20250716-hamoa_initial-v1-0-f6f5d0f9a163@oss.qualcomm.com> <20250716-hamoa_initial-v1-3-f6f5d0f9a163@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: tlFez2dIMI_dkzP8VgrxFJBnXy0qs_Ln X-Authority-Analysis: v=2.4 cv=D4xHKuRj c=1 sm=1 tr=0 ts=687958a4 cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=Wb1JkmetP80A:10 a=DGOirDVRF9kFrzJQLnUA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1HOtulTD9v-eNWfpl4qZ:22 X-Proofpoint-GUID: tlFez2dIMI_dkzP8VgrxFJBnXy0qs_Ln X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNzE3MDE3OCBTYWx0ZWRfXwTvIyHODTFHZ k4Hvg++mejQfDPPFrjq6NXLldnsO/I4NP2ZiTypY+WKu5tyVkIuSOBjTF/CqDVMZNn2bXRJ0Ve2 GiOqrG5HP9taHmweoOyoFUdAh/hnWfHvyVyR3xoZHcTQpPfhQ1xpbe33Gz1yVq5vKeVxZ27/rlQ G/2/L+BwEf7qojHjbq8WwLlwHtPEA4Q8Nm0CwO4gfR0dtPGYc0E9RUkLPjiDvDfZPFg830p3keM 1hhqvd6r0jubSo4vSryCMizJrsSeMzpeqCVXBKmxSv6yxtzZaBMIN0WkNwDRtpgICR9NPLRoTE/ 9FFFHHyK3VHNSmgMFd2/BiPlkUUNlWrNU3kqin62Ejh2ElnzW2RU4MdXUXmQ3dgu6WDfgzVzz6m S1thkGwnrEswx2uo1Am2HbHyaAuU15AxsN8NCrRCfsseiPv6u4c2C/sB07KhiQP3mszx/mxf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-07-17_03,2025-07-17_02,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 mlxlogscore=999 impostorscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 malwarescore=0 suspectscore=0 bulkscore=0 mlxscore=0 priorityscore=1501 phishscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505280000 definitions=main-2507170178 On 7/17/25 6:14 PM, Stephan Gerhold wrote: > On Wed, Jul 16, 2025 at 05:08:41PM +0800, Yijie Yang wrote: >> The HAMOA-IOT-SOM is a compact computing module that integrates a System >> on Chip (SoC) — specifically the x1e80100 — along with essential >> components optimized for IoT applications. It is designed to be mounted on >> carrier boards, enabling the development of complete embedded systems. >> >> This change enables and overlays the following components: >> - Regulators on the SOM >> - Reserved memory regions >> - PCIe6a and its PHY >> - PCIe4 and its PHY >> - USB0 through USB6 and their PHYs >> - ADSP, CDSP >> - WLAN, Bluetooth (M.2 interface) [...] >> +&usb_mp_hsphy0 { >> + vdd-supply = <&vreg_l2e_0p8>; >> + vdda12-supply = <&vreg_l3e_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_hsphy1 { >> + vdd-supply = <&vreg_l2e_0p8>; >> + vdda12-supply = <&vreg_l3e_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_qmpphy0 { >> + vdda-phy-supply = <&vreg_l3e_1p2>; >> + vdda-pll-supply = <&vreg_l3c_0p8>; >> + >> + status = "okay"; >> +}; >> + >> +&usb_mp_qmpphy1 { >> + vdda-phy-supply = <&vreg_l3e_1p2>; >> + vdda-pll-supply = <&vreg_l3c_0p8>; >> + >> + status = "okay"; >> +}; >> > > Assuming the USB ports are located on the carrier board and not the > SoM(?): > > Are carrier boards required to make use of all these USB > ports/interfaces? In my experience it's not unusual that embedded > carrier boards use only the functionality that they need. Maybe this > should just set the common properties and enabling individual ports for > PCIe and USB should be up to the carrier boards. The PHYs are on the SoC and if the kernel is told they're "disabled", they may possibly be left dangling from the bootloader Konrad