From: Scott Wood <oss@buserror.net>
To: Andy Tang <andy.tang@nxp.com>,
Vabhav Sharma <vabhav.sharma@nxp.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"mturquette@baylibre.com" <mturquette@baylibre.com>,
"sboyd@kernel.org" <sboyd@kernel.org>,
"rjw@rjwysocki.net" <rjw@rjwysocki.net>,
"viresh.kumar@linaro.org" <viresh.kumar@linaro.org>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"linux-pm@vger.kernel.org" <linux-pm@vger.kernel.org>,
"linux-kernel-owner@vger.kernel.org"
<linux-kernel-owner@vger.kernel.org>,
"catalin.marinas@arm.com" <catalin.marinas@arm.com>,
"will.deacon@arm.com" <will.deacon@arm.com>,
"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"arnd@arndb.de" <arnd@arndb.de>,
"kstewart@linuxfoundation.org" <kstewart@linuxfoundation.org>,
"yamada.masahiro@socionext.com" <yamada.masahiro@socionext.com>
Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>,
"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
Udit Kumar <udit.kumar@nxp.com>, Varun Sethi <V.Sethi@nxp.com>
Subject: Re: [PATCH 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a
Date: Mon, 03 Sep 2018 15:33:33 -0500 [thread overview]
Message-ID: <3a4274af2200923875ff05f945888a34d6dccee3.camel@buserror.net> (raw)
In-Reply-To: <DB5PR0401MB221332A5ED14C8E14C8D18A1F30C0@DB5PR0401MB2213.eurprd04.prod.outlook.com>
On Mon, 2018-09-03 at 01:17 +0000, Andy Tang wrote:
> Hi Scott,
>
> Please see my replay in line.
>
> > -----Original Message-----
> > From: Linuxppc-dev
> > <linuxppc-dev-bounces+b29983=freescale.com@lists.ozlabs.org> On
> > Behalf Of Scott Wood
> > Sent: 2018年9月1日 4:29
> > To: Andy Tang <andy.tang@nxp.com>; Vabhav Sharma
> > <vabhav.sharma@nxp.com>; linux-kernel@vger.kernel.org;
> > devicetree@vger.kernel.org; robh+dt@kernel.org;
> > mark.rutland@arm.com; linuxppc-dev@lists.ozlabs.org;
> > linux-arm-kernel@lists.infradead.org; mturquette@baylibre.com;
> > sboyd@kernel.org; rjw@rjwysocki.net; viresh.kumar@linaro.org;
> > linux-clk@vger.kernel.org; linux-pm@vger.kernel.org;
> > linux-kernel-owner@vger.kernel.org; catalin.marinas@arm.com;
> > will.deacon@arm.com; gregkh@linuxfoundation.org; arnd@arndb.de;
> > kstewart@linuxfoundation.org; yamada.masahiro@socionext.com
> > Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@nxp.com>;
> > linux@armlinux.org.uk; Udit Kumar <udit.kumar@nxp.com>; Varun Sethi
> > <V.Sethi@nxp.com>
> > Subject: Re: [PATCH 3/5] drivers: clk-qoriq: Add clockgen support for
> > lx2160a
> >
> > On Fri, 2018-08-31 at 06:12 +0000, Andy Tang wrote:
> > > We don't want to increase NUM_CMUX each time new soc with more
> >
> > cmuxes added.
> >
> > You don't want to have to make a trivial change each time you exceed a
> > limit that has yet to be exceeded once since NUM_CMUX was added?
> > This isn't ABI or in any other way hard to change. It's right in the same
> > file
> > as the chip description you'd be adding.
> >
> > And even if a chip did come along with 16 cmuxes, you'd then need to
> > increase the array to 17 to hold the -1 if you don't want to leave a
> > situation
> > like the
> > p4080 is in now, where a chip's cmux array could be broken by increasing
> > NUM_CMUX further.
> >
>
> [Andy] Adding buffer to a limitation number is always a good habit when
> coding. We often forget to increase this value when
> a new chip with more cmuxes added.
"often"? There has never been a new chip added with more cmuxes than p4080's
8, and if one does come along and you forget, the compiler should complain
about exceeding the array length with a static initializer. This isn't like
an array that is filled with a runtime-determined length.
> Like this patch, we didn't increase this value at first. We spent a lot of
> time finding out that NUM_CMUX needs to be increased too.
Are you talking about some other chip that you haven't sent a patch for yet?
Or is the cmux array for this chip wrong? What specifically did you see
happen "at first"?
> It is a personal preference how to set this value. I think it is better to
> increase it to 16, not NUM_CMUX+1 as long as we fix the P4080 issue
> even though it is a trivial change. And I agree the description needs to be
> updated.
I'm not the clock maintainer, so it's not up to me, but I don't see the point
in setting it to an arbitrary number, and I do not agree that increasing
NUM_CMUX is a suitable replacement for NUM_CMUX+1 in cmux_to_group[], as that
array should be one larger than cmux[] in order to allow every chip to have a
-1 terminator. In any case, any change to NUM_CMUX should be a separate patch
because it's not required for lx2160a support (assuming lx2160a was correctly
described by this patch).
-Scott
next prev parent reply other threads:[~2018-09-03 20:38 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-20 6:47 [PATCH 0/5] arm64: dts: NXP: add basic dts file for LX2160A SoC Vabhav Sharma
2018-08-20 6:47 ` [PATCH 1/5] dt-bindings: arm64: add compatible for LX2160A Vabhav Sharma
2018-08-20 6:47 ` [PATCH 2/5] soc/fsl/guts: Add compatible string " Vabhav Sharma
2018-08-20 6:47 ` [PATCH 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a Vabhav Sharma
2018-08-28 22:39 ` Stephen Boyd
2018-08-29 0:18 ` Scott Wood
2018-08-30 7:36 ` Vabhav Sharma
2018-08-30 17:39 ` Scott Wood
2018-08-30 17:42 ` Scott Wood
2018-08-31 6:12 ` Andy Tang
2018-08-31 20:28 ` Scott Wood
2018-09-03 1:17 ` Andy Tang
2018-09-03 20:33 ` Scott Wood [this message]
2018-09-04 3:08 ` Andy Tang
2018-08-20 6:47 ` [PATCH 4/5] arm64: dts: add QorIQ LX2160A SoC support Vabhav Sharma
2018-08-21 10:17 ` Sudeep Holla
2018-08-23 15:00 ` Vabhav Sharma
2018-08-20 6:47 ` [PATCH 5/5] arm64: dts: add LX2160ARDB board support Vabhav Sharma
2018-08-21 20:45 ` Rob Herring
2018-08-23 15:08 ` Vabhav Sharma
2018-08-24 16:16 ` Rob Herring
2018-08-29 0:28 ` Scott Wood
2018-10-11 10:04 ` Horia Geanta
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3a4274af2200923875ff05f945888a34d6dccee3.camel@buserror.net \
--to=oss@buserror.net \
--cc=V.Sethi@nxp.com \
--cc=andy.tang@nxp.com \
--cc=arnd@arndb.de \
--cc=catalin.marinas@arm.com \
--cc=devicetree@vger.kernel.org \
--cc=gregkh@linuxfoundation.org \
--cc=kstewart@linuxfoundation.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel-owner@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=mark.rutland@arm.com \
--cc=mturquette@baylibre.com \
--cc=rjw@rjwysocki.net \
--cc=robh+dt@kernel.org \
--cc=sboyd@kernel.org \
--cc=udit.kumar@nxp.com \
--cc=vabhav.sharma@nxp.com \
--cc=viresh.kumar@linaro.org \
--cc=will.deacon@arm.com \
--cc=yamada.masahiro@socionext.com \
--cc=yogeshnarayan.gaur@nxp.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®