From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.3 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE, SPF_PASS,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 844A4C433E0 for ; Tue, 29 Dec 2020 06:31:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3C08121D1B for ; Tue, 29 Dec 2020 06:31:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726323AbgL2Gbo (ORCPT ); Tue, 29 Dec 2020 01:31:44 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:9695 "EHLO szxga04-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725832AbgL2Gbo (ORCPT ); Tue, 29 Dec 2020 01:31:44 -0500 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4D4kzp2MP1zkwry; Tue, 29 Dec 2020 14:29:58 +0800 (CST) Received: from [127.0.0.1] (10.174.177.9) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.498.0; Tue, 29 Dec 2020 14:30:57 +0800 Subject: Re: [PATCH 1/1] ARM: LPAE: use phys_addr_t instead of unsigned long in outercache hooks To: Russell King - ARM Linux admin CC: Greg Kroah-Hartman , Will Deacon , Jason Cooper , Haojian Zhuang , Arnd Bergmann , linux-arm-kernel , linux-kernel References: <20201225114458.1334-1-thunder.leizhen@huawei.com> <20201226121346.GB1551@shell.armlinux.org.uk> From: "Leizhen (ThunderTown)" Message-ID: <3a597586-2bce-66cf-b9f8-4bb667a600d0@huawei.com> Date: Tue, 29 Dec 2020 14:30:56 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.7.0 MIME-Version: 1.0 In-Reply-To: <20201226121346.GB1551@shell.armlinux.org.uk> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.174.177.9] X-CFilter-Loop: Reflected Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2020/12/26 20:13, Russell King - ARM Linux admin wrote: > On Fri, Dec 25, 2020 at 07:44:58PM +0800, Zhen Lei wrote: >> The outercache of some Hisilicon SOCs support physical addresses wider >> than 32-bits. The unsigned long datatype is not sufficient for mapping >> physical addresses >= 4GB. The commit ad6b9c9d78b9 ("ARM: 6671/1: LPAE: >> use phys_addr_t instead of unsigned long in outercache functions") has >> already modified the outercache functions. But the parameters of the >> outercache hooks are not changed. This patch use phys_addr_t instead of >> unsigned long in outercache hooks: inv_range, clean_range, flush_range. >> >> To ensure the outercache that does not support LPAE works properly, do >> cast phys_addr_t to unsigned long by adding a middle-tier function. > > Please don't do that. The cast can be done inside the L2 functions > themselves without needing all these additional functions. OK. At first, I wanted to fit in like this: -static void l2c220_inv_range(unsigned long start, unsigned long end) +static void l2c220_inv_range(phys_addr_t lpae_start, phys_addr_t lpae_end) { + unsigned long start = lpae_start; + unsigned long end = lpae_end; > > We probably ought to also add some protection against addresses > 4GB, > although these are hot paths, so we don't want to add tests in these > functions. Maybe instead checking whether the system has memory above > 4GB while the L2 cache is being initialised would be a good idea? > I'm sorry, I didn't quite understand what you meant. Currently, the biggest problem is the compilation problem. The sizeof(long) may be 32, and the 64-bit physical address cannot be transferred from outcache functions to outcache hooks.