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[2003:cb:c738:7500:b60f:a446:46f6:5acf]) by smtp.gmail.com with ESMTPSA id l12-20020adfe58c000000b0031590317c26sm5545593wrm.61.2023.07.10.02.17.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 10 Jul 2023 02:17:47 -0700 (PDT) Message-ID: <3a66672b-6378-a8e6-a329-16f65201fe92@redhat.com> Date: Mon, 10 Jul 2023 11:17:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [RFC 0/4] arm64/mm: Clean up pte_dirty() state management To: Anshuman Khandual , linux-arm-kernel@lists.infradead.org Cc: Catalin Marinas , Will Deacon , Ryan Roberts , Mark Rutland , Andrew Morton , Jonathan Corbet , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org References: <20230707053331.510041-1-anshuman.khandual@arm.com> <60732ee3-f1c5-3534-29fc-783ec48f2c92@arm.com> Content-Language: en-US From: David Hildenbrand Organization: Red Hat In-Reply-To: <60732ee3-f1c5-3534-29fc-783ec48f2c92@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10.07.23 04:20, Anshuman Khandual wrote: > > > On 7/7/23 17:41, David Hildenbrand wrote: >> On 07.07.23 07:33, Anshuman Khandual wrote: >>> These pte_dirty() changes make things explicitly clear, while improving the >>> code readability. This optimizes HW dirty state transfer into SW dirty bit. >>> This also adds a new arm64 documentation explaining overall pte dirty state >>> management in detail. This series applies on the latest mainline kernel. >>> >>> >> >> I skimmed over most of the series, and I am not convinced that this is actually a cleanup. If we cannot really always differentiate between sw/hw clearing, why have separate primitives that give one the illusion that it could be done and that they are two different concepts? > > These are indeed two different concepts working together, the current code just > obscures that. Without these primitives it's even hard to follow how the SW and > HW dirty parts are intertwined in implementing the generic pte_dirty() state. > > The current code acknowledges these two different concepts in identifying them > i.e via pte_hw_dirty() and pte_sw_dirty(). > > #define pte_hw_dirty(pte) (pte_write(pte) && !(pte_val(pte) & PTE_RDONLY)) > #define pte_sw_dirty(pte) (!!(pte_val(pte) & PTE_DIRTY)) > ^ these primitives make sense to me, but not the clearing part. If there is only one way to clear both, then only have one primitive to clear both and state there, that separate clearing is impossible because both are intertwined. -- Cheers, David / dhildenb