From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2CF78C2D0C0 for ; Mon, 23 Dec 2019 13:44:02 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id F339F206CB for ; Mon, 23 Dec 2019 13:44:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726873AbfLWNoB (ORCPT ); Mon, 23 Dec 2019 08:44:01 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:46090 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726676AbfLWNoA (ORCPT ); Mon, 23 Dec 2019 08:44:00 -0500 Received: from DGGEMS404-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 1E959C499F930DB2F9D9; Mon, 23 Dec 2019 21:43:54 +0800 (CST) Received: from [127.0.0.1] (10.173.222.27) by DGGEMS404-HUB.china.huawei.com (10.3.19.204) with Microsoft SMTP Server id 14.3.439.0; Mon, 23 Dec 2019 21:43:44 +0800 Subject: Re: [PATCH] KVM: arm/arm64: vgic: Handle GICR_PENDBASER.PTZ filed as RAZ To: CC: , , , , , References: <20191220111833.1422-1-yuzenghui@huawei.com> From: Zenghui Yu Message-ID: <3a729559-d0eb-e042-d6bd-b69bacb0dd23@huawei.com> Date: Mon, 23 Dec 2019 21:43:42 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.2.0 MIME-Version: 1.0 In-Reply-To: <20191220111833.1422-1-yuzenghui@huawei.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.173.222.27] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2019/12/20 19:18, Zenghui Yu wrote: > Although guest will hardly read and use the PTZ (Pending Table Zero) > bit in GICR_PENDBASER, let us emulate the architecture strictly. > As per IHI 0069E 9.11.30, PTZ field is WO, and reads as 0. > > Signed-off-by: Zenghui Yu > --- > > Noticed when checking all fields of GICR_PENDBASER register. > But _not_ sure whether it's worth a fix, as Linux never sets > the PTZ bit before enabling LPI (set GICR_CTLR_ENABLE_LPIS). > > And I wonder under which scenarios can this bit be written as 1. > It seems difficult for software to determine whether the pending > table contains all zeros when writing this bit. > > virt/kvm/arm/vgic/vgic-mmio-v3.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/virt/kvm/arm/vgic/vgic-mmio-v3.c b/virt/kvm/arm/vgic/vgic-mmio-v3.c > index 7dfd15dbb308..ebc218840fc2 100644 > --- a/virt/kvm/arm/vgic/vgic-mmio-v3.c > +++ b/virt/kvm/arm/vgic/vgic-mmio-v3.c > @@ -414,8 +414,11 @@ static unsigned long vgic_mmio_read_pendbase(struct kvm_vcpu *vcpu, > gpa_t addr, unsigned int len) > { > struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; > + u64 value = vgic_cpu->pendbaser; > > - return extract_bytes(vgic_cpu->pendbaser, addr & 7, len); > + value &= ~GICR_PENDBASER_PTZ; > + > + return extract_bytes(value, addr & 7, len); > } > > static void vgic_mmio_write_pendbase(struct kvm_vcpu *vcpu, > I noticed there is no userspace access callbacks for GICR_PENDBASER, so this patch will make the PTZ field also 'Read As Zero' by userspace. Should we consider adding a uaccess_read callback for GICR_PENDBASER which just returns the unchanged vgic_cpu->pendbaser to userspace? (Though this is really not a big deal. We now always emulate the PTZ field to guest as RAZ. And 'vgic_cpu->pendbaser & GICR_PENDBASER_PTZ' only indicates whether KVM will optimize the LPI enabling process, where Read As Zero indicates never optimize..) Thanks, Zenghui