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From: "Andrew Jeffery" <andrew@aj.id.au>
To: "Steven Lee" <steven_lee@aspeedtech.com>
Cc: "Linus Walleij" <linus.walleij@linaro.org>,
	"Bartosz Golaszewski" <bgolaszewski@baylibre.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Joel Stanley" <joel@jms.id.au>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	"moderated list:ARM/ASPEED MACHINE SUPPORT" 
	<linux-arm-kernel@lists.infradead.org>,
	"moderated list:ARM/ASPEED MACHINE SUPPORT" 
	<linux-aspeed@lists.ozlabs.org>,
	"open list" <linux-kernel@vger.kernel.org>,
	"Hongwei Zhang" <Hongweiz@ami.com>,
	"Ryan Chen" <ryan_chen@aspeedtech.com>,
	"Billy Tsai" <billy_tsai@aspeedtech.com>,
	"Jeremy Kerr" <jk@codeconstruct.com.au>
Subject: Re: [PATCH v1 4/4] gpio: gpio-aspeed-sgpio: Add AST2600 sgpio support
Date: Thu, 27 May 2021 12:34:38 +0930	[thread overview]
Message-ID: <3a9513fa-bdd2-45c9-bb4a-18ae3953d28a@www.fastmail.com> (raw)
In-Reply-To: <20210527023455.GA9971@aspeedtech.com>

On Thu, 27 May 2021, at 12:04, Steven Lee wrote:
> The 05/27/2021 09:26, Andrew Jeffery wrote:
> > Hi Steven,
> > 
> > On Wed, 26 May 2021, at 19:16, Steven Lee wrote:
> > >  	struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
> > > -	const struct aspeed_sgpio_bank *bank = to_bank(offset);
> > >  	unsigned long flags;
> > >  	enum aspeed_sgpio_reg reg;
> > >  	int rc = 0;
> > >  
> > >  	spin_lock_irqsave(&gpio->lock, flags);
> > >  
> > > -	reg = aspeed_sgpio_is_input(offset) ? reg_val : reg_rdata;
> > > -	rc = !!(ioread32(bank_reg(gpio, bank, reg)) & GPIO_BIT(offset));
> > > +	reg = aspeed_sgpio_is_input(offset, gpio->max_ngpios) ? reg_val : 
> > > reg_rdata;
> > 
> > We should just pass gpio here (i.e. make aspeed_sgpio_is_input take a 
> > 'const struct aspeed_sgpio *' parameter), rather than open-coding 
> > gpio->max_ngpios. This approach will make it easier to refactor the 
> > implementation in the future (if necessary).
> > 
> 
> I will rewrite the function to use aspeed_sgpio struct.


> > >  	struct aspeed_sgpio *gpio = gpiochip_get_data(gc);
> > > -	const struct aspeed_sgpio_bank *bank = to_bank(offset);
> > >  	void __iomem *addr_r, *addr_w;
> > >  	u32 reg = 0;
> > >  
> > > -	if (aspeed_sgpio_is_input(offset))
> > > +	if (aspeed_sgpio_is_input(offset, gpio->max_ngpios))
> > >  		return -EINVAL;
> > >  
> > >  	/* Since this is an output, read the cached value from rdata, then
> > > @@ -209,9 +214,9 @@ static int sgpio_set_value(struct gpio_chip *gc, 
> > > unsigned int offset, int val)
> > >  	reg = ioread32(addr_r);
> > >  
> > >  	if (val)
> > > -		reg |= GPIO_BIT(offset);
> > > +		reg |= GPIO_BIT(offset % gpio->max_ngpios);
> > 
> > Pass gpio through GPIO_BIT() too.
> > 
> 
> I don't understand this comment.
> Could you describe more?

Oh, sure, what I was suggesting was to make a similar change to 
GPIO_BIT() as I suggested for aspeed_sgpio_is_input() above.

Hope that helps.

Andrew

      reply	other threads:[~2021-05-27  3:05 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-26  9:46 [PATCH v1 0/4] ASPEED sgpio driver enhancement Steven Lee
2021-05-26  9:46 ` [PATCH v1 1/4] dt-bindings: aspeed-sgpio: Convert txt bindings to yaml Steven Lee
2021-05-26 12:56   ` Rob Herring
2021-05-27  2:45     ` Steven Lee
2021-05-27  0:57   ` Andrew Jeffery
2021-05-27  1:03     ` Steven Lee
2021-05-27  1:42   ` Jeremy Kerr
2021-05-27  2:58     ` Steven Lee
2021-05-26  9:46 ` [PATCH v1 2/4] ARM: dts: aspeed-g6: Add SGPIO node Steven Lee
2021-05-27  1:27   ` Andrew Jeffery
2021-05-27  4:01     ` Steven Lee
2021-05-26  9:46 ` [PATCH v1 3/4] ARM: dts: aspeed-g5: Modify sgpio node for the enhanced sgpio driver Steven Lee
2021-05-26  9:46 ` [PATCH v1 4/4] gpio: gpio-aspeed-sgpio: Add AST2600 sgpio support Steven Lee
2021-05-26 14:04   ` kernel test robot
2021-05-26 14:05   ` kernel test robot
2021-05-27  1:26   ` Andrew Jeffery
2021-05-27  2:34     ` Steven Lee
2021-05-27  3:04       ` Andrew Jeffery [this message]

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