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Mon, 24 Mar 2025 11:29:40 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ThreadId: Tee0478150e682e72 Date: Mon, 24 Mar 2025 16:29:20 +0100 From: "Arnd Bergmann" To: "Akshay Gupta" , linux-hwmon@vger.kernel.org, linux-kernel@vger.kernel.org Cc: "Guenter Roeck" , "Greg Kroah-Hartman" , shyam-sundar.s-k@amd.com, gautham.shenoy@amd.com, "Mario Limonciello" , naveenkrishna.chatradhi@amd.com, anand.umarji@amd.com Message-Id: <3ab1116b-7021-4d83-847d-fdec53af9bee@app.fastmail.com> In-Reply-To: <20250324145815.1026314-9-akshay.gupta@amd.com> References: <20250324145815.1026314-1-akshay.gupta@amd.com> <20250324145815.1026314-9-akshay.gupta@amd.com> Subject: Re: [PATCH v6 08/11] misc: amd-sbi: Add support for CPUID protocol Content-Type: text/plain Content-Transfer-Encoding: 7bit On Mon, Mar 24, 2025, at 15:58, Akshay Gupta wrote: > struct apml_message { > /* > * [0]...[3] mailbox 32bit input > + * cpuid, > + * [4][5] cpuid: thread > + * [6] cpuid: ext function & read eax/ebx or ecx/edx > + * [7:0] -> bits [7:4] -> ext function & > + * bit [0] read eax/ebx or ecx/edx > * [7] read/write functionality > */ > union { > + __u64 cpu_msr_in; > __u32 mb_in[2]; > __u8 reg_in[8]; > } data_in; This changes the alignment of the structure and makes it incompatible between 32-bit and 64-bit userspace when there is an odd number of 32-bit words in it. Arnd