From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937776AbdAFS5S (ORCPT ); Fri, 6 Jan 2017 13:57:18 -0500 Received: from aserp1040.oracle.com ([141.146.126.69]:25555 "EHLO aserp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S937738AbdAFS5K (ORCPT ); Fri, 6 Jan 2017 13:57:10 -0500 Subject: Re: [PATCH 0/5] Use mmio-sram driver for Keystone MSMC RAM To: Suman Anna References: <20160901225846.31058-1-s-anna@ti.com> <287b7e1d-1453-2832-515d-e7e51373a3bc@oracle.com> Cc: Santosh Shilimkar , Russell King , Rob Herring , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Tero Kristo , Murali Karicheri , Vitaly Andrianov From: "santosh.shilimkar@oracle.com" Organization: Oracle Corporation Message-ID: <3abc3c7d-2f45-f5dd-e6f5-c03008d22d56@oracle.com> Date: Fri, 6 Jan 2017 10:56:16 -0800 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.12; rv:45.0) Gecko/20100101 Thunderbird/45.6.0 MIME-Version: 1.0 In-Reply-To: <287b7e1d-1453-2832-515d-e7e51373a3bc@oracle.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit X-Source-IP: aserv0021.oracle.com [141.146.126.233] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Suman, On 9/7/16 9:25 AM, Santosh Shilimkar wrote: > On 9/7/2016 9:22 AM, Suman Anna wrote: >> Hi Santosh, >> >> On 09/07/2016 11:11 AM, Santosh Shilimkar wrote: >>> Hi Suman, >>> >>> On 9/1/2016 3:58 PM, Suman Anna wrote: >>>> Hi, >>>> >>>> The Keystone 2 family of SoCs have an on-chip RAM called the >>>> Multicore Shared Memory (MSM) RAM. This RAM is accessible through >>>> the Multicore Shared Memory Controller (MSMC). This series represents >>>> these on-chip RAMs as sram nodes so that the memory allocations >>>> can be managed by the in-kernel mmio-sram driver. >>>> >>>> The first 4 patches adds the basic SRAM nodes on each of the SoCs, >>>> and the last patch enables the generic on-chip SRAM driver for >>>> keystone defconfig. >>>> >>> The series looks good in general but I would like to understand >>> the users of this memory in kernel. Is that going to be posted >>> as a follow up patch ? Is the Power controller going to make >>> use of this SRAM for PM code ? >> >> Yes, the users will eventually follow. Power Controller code is not >> gonna be using this SRAM, it has its own RAM. This memory is gonna be >> split between various functional features like IPC, OPTEE integration, >> we already have the Boot Monitor code using this. We will have the >> memory split by either having static child nodes or drivers requesting >> the memory using gen_pool API. >> > OK. Its good to add the code at least with one active user of it. > Since this has to anyway wait for another merge window, please post the > users of it so that I can pull the combined patchset. > Are you going to post new patchset or you dropped this series ? If you want me to include it for next merge window, please post refreshed patchset. Regards, Santosh