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Tue, 12 Aug 2025 15:23:59 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 57CFNwF9010964 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 12 Aug 2025 15:23:58 GMT Received: from [10.216.60.9] (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 12 Aug 2025 08:23:52 -0700 Message-ID: <3ac1efc5-4c17-410e-8a84-948e5c9cdd1a@quicinc.com> Date: Tue, 12 Aug 2025 20:53:49 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH V2 2/4] arm64: dts: qcom: sm8650: Enable MCQ support for UFS controller To: Dmitry Baryshkov CC: Krzysztof Kozlowski , , , , , , , , , , , , , , , , References: <20250811143139.16422-1-quic_rdwivedi@quicinc.com> <20250811143139.16422-3-quic_rdwivedi@quicinc.com> <67aedb2a-3ccc-4440-b2ff-b3dbedf5e25c@kernel.org> <9ff100b4-a3a5-4364-8172-1ccb5566e50c@quicinc.com> <27qmlr3lie54lyigl5v434yzvbes5twy6zgtkqb52ycfh23vsp@zdg57ifh7kog> Content-Language: en-US From: Ram Kumar Dwivedi In-Reply-To: <27qmlr3lie54lyigl5v434yzvbes5twy6zgtkqb52ycfh23vsp@zdg57ifh7kog> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Authority-Analysis: v=2.4 cv=IuYecK/g c=1 sm=1 tr=0 ts=689b5c8f cx=c_pps a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=GEpy-HfZoHoA:10 a=IkcTkHD0fZMA:10 a=2OwXVqhp2XgA:10 a=COk6AnOGAAAA:8 a=GiozvvAXbBCNVtD0RQIA:9 a=QEXdDO2ut3YA:10 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-ORIG-GUID: EAODzY8Jadu8K-twJvAUUxb6RdQKm2wk X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwODA5MDAyNSBTYWx0ZWRfX2xFoNpSCmq3z 5GBl/P/YdDYcxIn7/xlYzMBqlWJnAXztN0cnuDb6GQcIChkyLDQw/669Vxs6W8luiIX8+tj6DZ0 4KjKoLw04+zQSPLYptI6qsl6GislkUoo3BMSmjwkNeIkFNkigF9Jga8xHedda9jyD6kpZeoqc2I r31jLsghFvdisJnVdtDTdWV6sQAlZ6YiRw2fZoXtusGSdiFsAT9tHepgwPPEQH2ZqFZ2ajjG+tJ sEE0CI1QxRIO6euPvgBqyrZ6OY73e7CUuNh3afM9QkzwKw+T81yY7FADa8UIQi5ZMADWSSADdEs NZqUJeWoLtvdX6YnXNa/6wVKbUXX99RYwUg4rAYLuYgpJqF5DQ9mDeWdupbPkkVzA5cd8KiO1eA 98r/Ysxx X-Proofpoint-GUID: EAODzY8Jadu8K-twJvAUUxb6RdQKm2wk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-08-12_07,2025-08-11_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 malwarescore=0 spamscore=0 priorityscore=1501 adultscore=0 clxscore=1015 phishscore=0 suspectscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2508090025 On 12-Aug-25 4:25 PM, Dmitry Baryshkov wrote: > On Mon, Aug 11, 2025 at 10:24:29PM +0530, Ram Kumar Dwivedi wrote: >> >> >> On 11-Aug-25 8:13 PM, Krzysztof Kozlowski wrote: >>> On 11/08/2025 16:31, Ram Kumar Dwivedi wrote: >>>> Enable Multi-Circular Queue (MCQ) support for the UFS host controller >>>> on the Qualcomm SM8650 platform by updating the device tree node. This >>>> includes adding new register region for MCQ and specifying the MSI parent >>>> required for MCQ operation. >>>> >>>> Signed-off-by: Ram Kumar Dwivedi >>>> --- >>>> arch/arm64/boot/dts/qcom/sm8650.dtsi | 7 ++++++- >>>> 1 file changed, 6 insertions(+), 1 deletion(-) >>> >>> Way you organize your patchset is confusing. Why DTS is in the middle? >>> It suggests dependency and this would be strong objection from me. >> >> Hi Krzysztof, >> >> My current patch submission order is as follows: >> >> 1.DT binding >> 2.Device tree >> 3.Driver changes >> >> Please let me know if you'd prefer to rearrange the order and place the driver patch in the middle. > > THe recommended way is opposite: > > - DT bindings > - Driver changes > - DT changes > > This lets maintainers to pick up their parts with less troubles. Hi Dmitry and Krzysztof, Thanks for the suggestion. I'll update the next patchset order to follow the recommended structure: 1. DT bindings 2. Driver changes 3. DT changes Appreciate the guidance. Thanks, Ram. > >> >> >> Regards, >> Ram >>> >>> Please read carefully writing bindings, submitting patches in DT and SoC >>> maintainer profile. >>> >>> Best regards, >>> Krzysztof >> >