From: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: Biju Das <biju.das.jz@bp.renesas.com>,
Marc Kleine-Budde <mkl@pengutronix.de>
Cc: "mailhol@kernel.org" <mailhol@kernel.org>,
"robh@kernel.org" <robh@kernel.org>,
"krzk+dt@kernel.org" <krzk+dt@kernel.org>,
"conor+dt@kernel.org" <conor+dt@kernel.org>,
"geert+renesas@glider.be" <geert+renesas@glider.be>,
"magnus.damm" <magnus.damm@gmail.com>,
Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
"Claudiu.Beznea" <claudiu.beznea@tuxon.dev>,
"linux-can@vger.kernel.org" <linux-can@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Subject: Re: [PATCH v4 1/7] dt-bindings: can: renesas,rcar-canfd: Document RZ/G3S SoC
Date: Mon, 19 Oct 2026 11:01:55 +0300 [thread overview]
Message-ID: <3ac7b72a-3468-49f6-b4d3-6b33e252ffc6@tuxon.dev> (raw)
In-Reply-To: <TY3PR01MB1134682A7E8AEDB860F02752D86982@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Hi, Biju,
On 10/19/26 10:24, Biju Das wrote:
> Hi Claudiu,
>
>> -----Original Message-----
>> From: Marc Kleine-Budde <mkl@pengutronix.de>
>> Sent: 16 October 2026 14:34
>> Subject: Re: [PATCH v4 1/7] dt-bindings: can: renesas,rcar-canfd: Document RZ/G3S SoC
>>
>> On 02.09.2026 17:15:38, Claudiu Beznea wrote:
>>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>>
>>> The CAN FD controller found on the Renesas RZ/G3S SoC is largely
>>> compatible with the variant present on the RZ/G3E SoC. The main differences are:
>>> - the RZ/G3S provides only two CAN FD channels
>>> - the RZ/G3S supports only CAN FD operation; the Channel n CAN FD
>>> Configuration Register does not implement the bits used to select
>>> classical CAN-only mode (bit 30) or CAN FD-only mode (bit 28);
>>> consequently, bit 31 (CAN FD Frame Distinction Enable) of the same
>>> register is also not implemented
>>> - some bits in several registers (mainly reserved or status bits) are
>>> read-write on the RZ/G3S but read-only on the RZ/G3E; their behavior is
>>> otherwise identical: the bits read back as 0 on both SoCs and software
>>> is allowed to write only 0 to them on the RZ/G3S
>>> - the RZ/G3S provides 256 acceptance filters, compared to 768 on the
>>> RZ/G3E
>>> - the RZ/G3S can use PCLK clock as the CAN FD clock source through an
>>> internal clock divider, while also supporting an external CAN FD clock
>>> source
>>>
>>> Since:
>>> - the SoC clock generator provides to the CAN IP only the peripheral and
>>> the RAM clocks
>>> - when sourced from the peripheral clock, the CAN-FD clock is obtained
>>> inside the IP itself by dividing the peripheral clock
>>> - the assigned-clocks and assigned-clock-rates properties are specific to
>>> the CAN-FD clock
>>> the assigned-clocks and assigned-clock-rates properties were dropped
>>> from the required properties list of the Renesas RZ/G3S SoC.
>>>
>>> Add documentation for the Renesas RZ/G3S SoC.
>>>
>>> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
>>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>
>> the netdev review bot has found a nitpick, it's about the comment in "rcar_canfd.c". Can you fix it, if
>> you re-spin the series.
>>
>> regards,
>> Marc
>>
>> pw-bot: cr
>>
>> --- Patch [11]: [PATCH net-next 11/37] dt-bindings: can: renesas,rcar-canfd: Document RZ/G3S SoC ---
>> commit 69b4e37d18e5229e1c800b45a5df061af8a98eb9
>> Author: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
>>
>> dt-bindings: can: renesas,rcar-canfd: Document RZ/G3S SoC
>>
>> This adds the renesas,r9a08g045-canfd compatible for the RZ/G3S CAN FD controller. It adds the compatible
>> to the existing conditional blocks. It also forbids renesas,no-can-fd and renesas,fd-only on RZ/G3S, and
>> makes assigned-clocks and assigned-clock-rates required only for the other SoCs.
>>
>> Link: https://patch.msgid.link/20260902141544.565763-2-claudiu.beznea+renesas@tuxon.dev
>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
>>> b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
>>> index b9d9dd7a7967..bbaaef8f4282 100644
>>> ---
>>> a/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
>>> +++ b/Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yam
>>> +++ l
>>
>> [ ... ]
>>
>>> @@ -350,6 +352,20 @@ allOf:
>>> properties:
>>> reset-names: false
>>>
>>> + - if:
>>> + properties:
>>> + compatible:
>>> + contains:
>>> + const: renesas,r9a08g045-canfd
>>> + then:
>>> + properties:
>>> + renesas,no-can-fd: false
>>
>> Discovered by: opus-5-5 · Missed by: fable-5-1, gpt-6-astra, sashiko-gemini · Confirmed by: fable-5-1
>> This isn't a bug, but should the renesas,no-can-fd description be updated to match this new constraint?
>>
>> The property description in the same binding still says that every controller can run in Classical CAN
>> mode:
>>
>> renesas,no-can-fd:
>> $ref: /schemas/types.yaml#/definitions/flag
>> description:
>> The controller can operate in either CAN-FD mode (default) or FD-Only
>> mode (RZ/{G2L,G3E} and R-Car Gen4) or Classical CAN mode. Specify this
>> property to put the controller in Classical CAN mode.
>>
>> With this patch the property is forbidden for renesas,r9a08g045-canfd, because RZ/G3S does not have the
>> mode select bits.
>>
>> The header comment in drivers/net/can/rcar/rcar_canfd.c says the same
>> thing:
>>
>> * To switch the controller to Classical CAN (CAN 2.0) only mode, add
>> * "renesas,no-can-fd" optional property to the device tree node. A h/w reset is
>> * also required to switch modes.
>>
>> Neither text is changed later in the series. Both now contradict the schema for RZ/G3S, and for RZ/G3L
>> once it is added the same way.
>>
>> Could the description exclude the SoCs that only support CAN FD mode?
>
>
> Do you plan to update description of renesas,no-canfd in bindings/driver exempting Classical CAN mode
> for RZ/G3S? Or do you want me to update?
I intend to send follow up patches today. If you already have something prepared
for this, please send it.
Thank you,
Claudiu
next prev parent reply other threads:[~2026-10-19 8:02 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-02 14:15 [PATCH v4 0/7] can: rcar_canfd: Add support for Renesas RZ/G3S Claudiu Beznea
2026-09-02 14:15 ` [PATCH v4 1/7] dt-bindings: can: renesas,rcar-canfd: Document RZ/G3S SoC Claudiu Beznea
2026-10-16 13:34 ` Marc Kleine-Budde
2026-10-19 7:24 ` Biju Das
2026-10-19 8:01 ` Claudiu Beznea [this message]
2026-10-19 8:26 ` Biju Das
2026-09-02 14:15 ` [PATCH v4 2/7] can: rcar_canfd: Fix typos in macro names Claudiu Beznea
2026-09-02 14:15 ` [PATCH v4 3/7] can: rcar_canfd: Allow the CAN FD clock to be sourced from fck Claudiu Beznea
2026-10-16 13:39 ` Marc Kleine-Budde
2026-10-16 18:07 ` Claudiu Beznea
2026-10-17 20:01 ` Marc Kleine-Budde
2026-10-19 9:58 ` claudiu beznea
2026-10-19 10:21 ` Marc Kleine-Budde
2026-10-19 10:36 ` claudiu beznea
2026-10-19 10:42 ` Marc Kleine-Budde
2026-09-02 14:15 ` [PATCH v4 4/7] can: rcar_canfd: Do not set registers selecting the CAN mode Claudiu Beznea
2026-09-02 14:15 ` [PATCH v4 5/7] can: rcar_canfd: Add support for Renesas RZ/G3S Claudiu Beznea
2026-09-02 14:15 ` [PATCH v4 6/7] arm64: dts: renesas: r9a08g045: Add CAN-FD node Claudiu Beznea
2026-09-02 14:15 ` [PATCH v4 7/7] arm64: dts: renesas: rzg3s-smarc: Enable CAN-FD Claudiu Beznea
2026-09-29 14:19 ` [PATCH v4 0/7] can: rcar_canfd: Add support for Renesas RZ/G3S Marc Kleine-Budde
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