From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [213.167.242.64]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA42D20F09A for ; Mon, 16 Jun 2025 15:40:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=213.167.242.64 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750088452; cv=none; b=JdlzuzIkH9uR7PMQ1BJz5KgVOzBSOZocDxJMJUoI9Qh7hozzsj+FFG04zUHKozZw63j/CFWnH5Gx+vHug0rHXQSXK28LfKxmx3Hac4mGecyfWARj9+ZXNF+bi+Mu8dM8v/DkuF+k1avKXcv0BYnCZoyZOCNf606/MaCSbfA15AM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750088452; c=relaxed/simple; bh=GulDPnHNMOiMPgHTzF8enV28qBP0ODLdaQ7945icZi4=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=R0f3tEvKpCT1TcWkAUtsKWG1KhxPnj+LmO2OyvmAYb2B+OeSp6RPJ1P+Qf/nvC+e8tPyXetjGMDyIUhUd5PzIZ7AzhtXpS1fZXYrcE2n5ZeZP10DioRrJQ1QnuGhVF6SuQ1AHfPnPeNvM3csx1Sh50wLUxmDDEJ/a2xp0U+/cRg= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com; spf=pass smtp.mailfrom=ideasonboard.com; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b=noZrMPIv; arc=none smtp.client-ip=213.167.242.64 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ideasonboard.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ideasonboard.com header.i=@ideasonboard.com header.b="noZrMPIv" Received: from [192.168.88.20] (91-158-153-178.elisa-laajakaista.fi [91.158.153.178]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 3498E346; Mon, 16 Jun 2025 17:40:36 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1750088437; bh=GulDPnHNMOiMPgHTzF8enV28qBP0ODLdaQ7945icZi4=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=noZrMPIvU1Mank2i1vNQ1njqr3BZcLasIJ/CeoC6r4lIf4aaFNBgUIwGph6QhREUU TawlYtLpGkIRhqZ7bVPnboTszbxRWX5DKyFiKZ+UTvcqjttmf2onKP2D/A45VAgtDV EZwApC+JoEms1Br9jXFhzeWLbfIWK2QyOzWh0nBk= Message-ID: <3adb1d12-7cd5-4beb-9978-c3cae702f338@ideasonboard.com> Date: Mon, 16 Jun 2025 18:40:44 +0300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v13 3/4] drm/atomic-helper: Re-order bridge chain pre-enable and post-disable To: Marek Szyprowski , Aradhya Bhatia Cc: DRI Development List , Linux Kernel List , Nishanth Menon , Vignesh Raghavendra , Devarsh Thakkar , Jayesh Choudhary , Alexander Sverdlin , Dmitry Baryshkov , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter References: <20250605171524.27222-1-aradhya.bhatia@linux.dev> <20250605171524.27222-4-aradhya.bhatia@linux.dev> <2c51cf39-13cb-413f-8dd5-53bc1c11467a@samsung.com> <306f142f-f9c9-44ab-a5b9-c71db76b2b80@ideasonboard.com> Content-Language: en-US From: Tomi Valkeinen Autocrypt: addr=tomi.valkeinen@ideasonboard.com; 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charset=UTF-8 Content-Transfer-Encoding: 7bit Hi, On 12/06/2025 09:31, Marek Szyprowski wrote: > On 12.06.2025 07:49, Tomi Valkeinen wrote: >> On 11/06/2025 13:45, Marek Szyprowski wrote: >>> On 05.06.2025 19:15, Aradhya Bhatia wrote: >>>> From: Aradhya Bhatia >>>> >>>> Move the bridge pre_enable call before crtc enable, and the bridge >>>> post_disable call after the crtc disable. >>>> >>>> The sequence of enable after this patch will look like: >>>> >>>> bridge[n]_pre_enable >>>> ... >>>> bridge[1]_pre_enable >>>> >>>> crtc_enable >>>> encoder_enable >>>> >>>> bridge[1]_enable >>>> ... >>>> bridge[n]_enable >>>> >>>> And, the disable sequence for the display pipeline will look like: >>>> >>>> bridge[n]_disable >>>> ... >>>> bridge[1]_disable >>>> >>>> encoder_disable >>>> crtc_disable >>>> >>>> bridge[1]_post_disable >>>> ... >>>> bridge[n]_post_disable >>>> >>>> The definition of bridge pre_enable hook says that, >>>> "The display pipe (i.e. clocks and timing signals) feeding this bridge >>>> will not yet be running when this callback is called". >>>> >>>> Since CRTC is also a source feeding the bridge, it should not be enabled >>>> before the bridges in the pipeline are pre_enabled. Fix that by >>>> re-ordering the sequence of bridge pre_enable and bridge post_disable. >>>> >>>> While at it, update the drm bridge API documentation as well. >>>> >>>> Acked-by: Dmitry Baryshkov >>>> Reviewed-by: Tomi Valkeinen >>>> Reviewed-by: Thomas Zimmermann >>>> Tested-by: Tomi Valkeinen >>>> Tested-by: Alexander Sverdlin >>>> Signed-off-by: Aradhya Bhatia >>>> Signed-off-by: Aradhya Bhatia >>> This patch landed in today's linux-next as commit c9b1150a68d9 >>> ("drm/atomic-helper: Re-order bridge chain pre-enable and >>> post-disable"). In my tests I found that it breaks booting of Samsung >>> Exynos 5420/5800 based Chromebooks (Peach-Pit and Peach-Pi). Both of >>> them use Exynos DRM with Exynos_DP sub-driver (Analogix DP) and EDP >>> panel. Booting stops at '[drm] Initialized exynos 1.1.0 for exynos-drm >>> on minor 0' message. On the other hand, the Samsung Exynos5250 based >>> Snow Chromebook boots fine, but it uses dp-lvds nxp,ptn3460 bridge and >>> lvds panel instead of edp panels. This looks like some sort of deadlock, >>> because if I disable FBDEV emulation, those boards boots fine and I'm >>> able to run modetest and enable the display. Also the DRM kernel logger >>> seems to be working fine, although I didn't check the screen output yet, >>> as I only have a remote access to those boards. I will investigate it >>> further and let You know. >> Thanks for the report. I was trying to understand the pipeline, but I'm >> a bit confused. Above you say Peach-Pit uses DP and EDP panel, but if I >> look at arch/arm/boot/dts/samsung/exynos5420-peach-pit.dts, it connects >> a dp->lvds bridge (parade,ps8625). Peach-Pi seems to connect to an eDP >> panel. >> >> Is the above correct? Do both Peach-Pi and Peach-Pit fail? > > Yes, sorry, my fault. I much have checked the same (peach-pi) dts 2 > times. Both Peach-Pi and Peach-Pit fails, while Snow works fine. All > three use the same Exynos DP (based on analogix dp) driver. I will try > to play a bit more with those boards in the afternoon, hopefully getting > some more hints where the issue is. Did you get a chance to test this more? Any hints what happens will help =) Tomi