From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from canpmsgout06.his.huawei.com (canpmsgout06.his.huawei.com [113.46.200.221]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3475E192D8A for ; Wed, 8 Apr 2026 01:50:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.221 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775613045; cv=none; b=d/BOon77HVG/l65DFDmouk3ppu9NHorX/vL7DLekbny3oL6r3GrysKjINDUOGDVuUwuwwYuWVQsZiJzhmiZBO75wgy69qk1WJvA/3lk8tzLIgaAnOCJaxKCM3KVm2uRPda22z42ODP8786eL8yyKOZj022oHJU0gOXXk9Usqi8A= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1775613045; c=relaxed/simple; bh=smm+DFxC4sY1RrzPKk4/mfBrnDKUfFnUE91DvkNTUOs=; h=Message-ID:Date:MIME-Version:Subject:To:CC:References:From: In-Reply-To:Content-Type; b=gKkSWhmZ4IokZH38QgcGx3nOeWGmvEoPRfII1q0jvCqAq4BlOoE1+y4L4KdVZJuUV8zfzE+zR/KI/ohbJZvff7Xm0GkY9mPuMU0KPI32lB9XM6ISoog/8IR9GsJB5qW6af8LP2sLsxhtHudz1tfG4wvKibf6kF1vWZYOy6DUlr0= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=MWWp/cEx; arc=none smtp.client-ip=113.46.200.221 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="MWWp/cEx" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=oyE4CQgdazk9TvXMcT4uIOX0z6M4JHt2jPBcB6gTN8Q=; b=MWWp/cEx5bzXjjGSdNs79WabodKbJ3BBNtQsERBzCwOjkTbnP6gYBrggVWWlwFNZ1ha4jvA2i HwAW8xrXiyrlucn4XiZvRCVJ8awhALzy2LU2c4Oa0sDRluwT6z9d/AT4/3OIaFmP1CQ+6R2pLIG XvwgChP+6wSwjMEqYAQ6vfo= Received: from mail.maildlp.com (unknown [172.19.162.144]) by canpmsgout06.his.huawei.com (SkyGuard) with ESMTPS id 4fr5TQ4zTxzRhT3; Wed, 8 Apr 2026 09:44:26 +0800 (CST) Received: from dggpemf500011.china.huawei.com (unknown [7.185.36.131]) by mail.maildlp.com (Postfix) with ESMTPS id 9300440538; Wed, 8 Apr 2026 09:50:40 +0800 (CST) Received: from [10.67.109.254] (10.67.109.254) by dggpemf500011.china.huawei.com (7.185.36.131) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Wed, 8 Apr 2026 09:50:39 +0800 Message-ID: <3ae3e1d3-c951-8204-82f8-0c0d431517c0@huawei.com> Date: Wed, 8 Apr 2026 09:50:37 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.2.0 Subject: Re: [PATCH 08/10] arm64: entry: Use irqentry_{enter_from,exit_to}_kernel_mode() Content-Language: en-US To: Mark Rutland , , Catalin Marinas , Will Deacon CC: , , , , , References: <20260407131650.3813777-1-mark.rutland@arm.com> <20260407131650.3813777-9-mark.rutland@arm.com> From: Jinjie Ruan In-Reply-To: <20260407131650.3813777-9-mark.rutland@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-ClientProxiedBy: kwepems500002.china.huawei.com (7.221.188.17) To dggpemf500011.china.huawei.com (7.185.36.131) On 2026/4/7 21:16, Mark Rutland wrote: > The generic irqentry code now provides irqentry_enter_from_kernel_mode() > and irqentry_exit_to_kernel_mode(), which can be used when an exception > is known to be taken from kernel mode. These can be inlined into > architecture-specific entry code, and avoid redundant work to test > whether the exception was taken from user mode. > > Use these in arm64_enter_from_kernel_mode() and > arm64_exit_to_kernel_mode(), which are only used for exceptions known to > be taken from kernel mode. This will remove a small amount of redundant > work, and will permit further changes to arm64_exit_to_kernel_mode() in > subsequent patches. > > There should be no funcitonal change as a result of this patch. > > Signed-off-by: Mark Rutland > Cc: Andy Lutomirski > Cc: Catalin Marinas > Cc: Jinjie Ruan > Cc: Peter Zijlstra > Cc: Thomas Gleixner > Cc: Vladimir Murzin > Cc: Will Deacon > --- > arch/arm64/kernel/entry-common.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c > index 3d01cdacdc7a2..16a65987a6a9b 100644 > --- a/arch/arm64/kernel/entry-common.c > +++ b/arch/arm64/kernel/entry-common.c > @@ -39,7 +39,7 @@ static noinstr irqentry_state_t arm64_enter_from_kernel_mode(struct pt_regs *reg > { > irqentry_state_t state; > > - state = irqentry_enter(regs); > + state = irqentry_enter_from_kernel_mode(regs); > mte_check_tfsr_entry(); > mte_disable_tco_entry(current); > > @@ -55,7 +55,7 @@ static void noinstr arm64_exit_to_kernel_mode(struct pt_regs *regs, > irqentry_state_t state) > { > mte_check_tfsr_exit(); > - irqentry_exit(regs, state); > + irqentry_exit_to_kernel_mode(regs, state); Reviewed-by: Jinjie Ruan > } > > /*