From: Rik van Riel <riel@surriel.com>
To: Nicholas Piggin <npiggin@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>,
linux-kernel@vger.kernel.org, x86@kernel.org
Subject: Re: Possibility of conflicting memory types in lazier TLB mode?
Date: Fri, 15 May 2020 15:24:28 -0400 [thread overview]
Message-ID: <3b217554a8a337de544482d20ddf8f2152559cd3.camel@surriel.com> (raw)
In-Reply-To: <1589523957.s4pf3vd48l.astroid@bobo.none>
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On Fri, 2020-05-15 at 16:50 +1000, Nicholas Piggin wrote:
>
> But what about if there are (real, not speculative) stores in the
> store
> queue still on the lazy thread from when it was switched, that have
> not
> yet become coherent? The page is freed by another CPU and reallocated
> for something that maps it as nocache. Do you have a coherency
> problem
> there?
>
> Ensuring the store queue is drained when switching to lazy seems like
> it
> would fix it, maybe context switch code does that already or you
> have
> some other trick or reason it's not a problem. Am I way off base
> here?
On x86, all stores become visible in-order globally.
I suspect that
means any pending stores in the queue
would become visible to the rest of the system before
the store to the "current" cpu-local variable, as
well as other writes from the context switch code
become visible to the rest of the system.
Is that too naive a way of preventing the scenario you
describe?
What am I overlooking?
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next prev parent reply other threads:[~2020-05-15 19:35 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-15 6:50 Nicholas Piggin
2020-05-15 19:24 ` Rik van Riel [this message]
2020-05-16 2:35 ` Nicholas Piggin
2020-05-27 0:09 ` Andy Lutomirski
2020-05-27 12:06 ` Andrew Cooper
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