From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 767C9C433EF for ; Sat, 25 Jun 2022 01:16:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230490AbiFYBQH (ORCPT ); Fri, 24 Jun 2022 21:16:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41686 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229450AbiFYBQF (ORCPT ); Fri, 24 Jun 2022 21:16:05 -0400 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D4AD40A19; Fri, 24 Jun 2022 18:16:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1656119764; x=1687655764; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=uua8kxPJXfOueiekdB2Tgio7+vOKfLeb4cJSDLh9XaA=; b=NpEP0gfnbj8eiLKcYge27K0r2wzCy3iJQb8muaea144jXi9EOzMc40G5 WS3bQUEHLgU51WPqqin2spVX2SueImuWg/GFCOYGbnQNVSDN5hPeEhtGu dL1bp3sCC+8PnotH3iGD3CFrI5RsVrkwD9rv3cWFjAtv0iILP3rYkFqYb M=; Received: from ironmsg07-lv.qualcomm.com ([10.47.202.151]) by alexa-out.qualcomm.com with ESMTP; 24 Jun 2022 18:16:04 -0700 X-QCInternal: smtphost Received: from nasanex01c.na.qualcomm.com ([10.47.97.222]) by ironmsg07-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Jun 2022 18:16:03 -0700 Received: from nalasex01a.na.qualcomm.com (10.47.209.196) by nasanex01c.na.qualcomm.com (10.47.97.222) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 24 Jun 2022 18:16:03 -0700 Received: from [10.111.168.196] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.22; Fri, 24 Jun 2022 18:15:59 -0700 Message-ID: <3b3ae4d6-ec49-6c1e-ece7-ef49adb2f85c@quicinc.com> Date: Fri, 24 Jun 2022 18:15:57 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.2 Subject: Re: [PATCH v1 2/3] drm/msm/dp: decoupling dp->id out of dp controller_id at scxxxx_dp_cfg table Content-Language: en-US To: Stephen Boyd , Kuogee Hsieh , , , , , , , , , , CC: , , , , References: <1656090912-18074-1-git-send-email-quic_khsieh@quicinc.com> <326912ff-9771-0711-366d-79acd436908b@quicinc.com> <0ff3d6a3-dc5c-7c77-f8a1-6c4f6c1a3215@quicinc.com> <66ff4642-f268-f5b0-7e28-b196368c508a@quicinc.com> <5cf094cf-343a-82d7-91c4-1284683f9748@quicinc.com> From: Abhinav Kumar In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 6/24/2022 5:23 PM, Stephen Boyd wrote: > Quoting Stephen Boyd (2022-06-24 17:11:01) >> Quoting Abhinav Kumar (2022-06-24 17:03:37) >>> >>> So let me try to explain this as this is what i understood from the >>> patch and how kuogee explained me. >>> >>> The ordering of the array still matters here and thats what he is trying >>> to address with the second change. >> >> The order of the array should not matter. That's the problem. > > It seems like somewhere else the order of the array matters, presumably > while setting up encoders? > >> >>> >>> So as per him, he tried to swap the order of entries like below and that >>> did not work and that is incorrect behavior because he still retained >>> the MSM_DP_CONTROLLER_x field for the table like below: >>> >>> diff --git a/drivers/gpu/drm/msm/dp/dp_display.c >>> b/drivers/gpu/drm/msm/dp/dp_display.c >>> index dcd80c8a794c..7816e82452ca 100644 >>> --- a/drivers/gpu/drm/msm/dp/dp_display.c >>> +++ b/drivers/gpu/drm/msm/dp/dp_display.c >>> @@ -140,8 +140,8 @@ static const struct msm_dp_config sc7180_dp_cfg = { >>> >>> static const struct msm_dp_config sc7280_dp_cfg = { >>> .descs = (const struct msm_dp_desc[]) { >>> - [MSM_DP_CONTROLLER_0] = { .io_start = 0x0ae90000, >>> .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, >>> [MSM_DP_CONTROLLER_1] = { .io_start = 0x0aea0000, >>> .connector_type = DRM_MODE_CONNECTOR_eDP, .wide_bus_en = true }, >>> + [MSM_DP_CONTROLLER_0] = { .io_start = 0x0ae90000, >>> .connector_type = DRM_MODE_CONNECTOR_DisplayPort, .wide_bus_en = true }, >>> }, >>> .num_descs = 2, >>> }; >>> >>> >>> The reason order is important is because in this function below, even >>> though it matches the address to find which one to use it loops through >>> the array and so the value of *id will change depending on which one is >>> located where. >>> >>> static const struct msm_dp_desc *dp_display_get_desc(struct >>> platform_device *pdev, >>> unsigned int *id) >> >> Thanks! We should fix this function to not overwrite the id. >> > > Ah nevermind. I mixed up dp->id and h_tile_instance thinking one was > overwriting the other but that doesn't make any sense. Yes, I also misunderstood one point. Even if we re-order like above, we are still retaining the index correctly so that will still work. I checked with kuogee again now, he mentioned he needs this only for patch 3. He is not sure of the root-cause of why turning ON the first display fixes the issue . I think that needs to be debugged correctly to answers questions posted by you / Dmitry. Lets hold on these patches till we have the answers.