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[86.30.250.44]) by smtp.googlemail.com with ESMTPSA id u26sm19101660wrd.87.2019.10.22.05.24.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 22 Oct 2019 05:24:19 -0700 (PDT) Subject: Re: [PATCH 1/2] dt-bindings: nvmem: add binding for Rockchip OTP controller To: Heiko Stuebner Cc: robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, christoph.muellner@theobroma-systems.com References: <20190925184957.14338-1-heiko@sntech.de> From: Srinivas Kandagatla Message-ID: <3b5f4018-82b1-946d-d81d-252eb872d5d1@linaro.org> Date: Tue, 22 Oct 2019 13:24:18 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: <20190925184957.14338-1-heiko@sntech.de> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 25/09/2019 19:49, Heiko Stuebner wrote: > Newer Rockchip SoCs use a different IP for accessing special one- > time-programmable memory, so add a binding for these controllers. > > Signed-off-by: Heiko Stuebner Applied both, thanks, srini > --- > .../bindings/nvmem/rockchip-otp.txt | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > create mode 100644 Documentation/devicetree/bindings/nvmem/rockchip-otp.txt > > diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt b/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt > new file mode 100644 > index 000000000000..40f649f7c2e5 > --- /dev/null > +++ b/Documentation/devicetree/bindings/nvmem/rockchip-otp.txt > @@ -0,0 +1,25 @@ > +Rockchip internal OTP (One Time Programmable) memory device tree bindings > + > +Required properties: > +- compatible: Should be one of the following. > + - "rockchip,px30-otp" - for PX30 SoCs. > + - "rockchip,rk3308-otp" - for RK3308 SoCs. > +- reg: Should contain the registers location and size > +- clocks: Must contain an entry for each entry in clock-names. > +- clock-names: Should be "otp", "apb_pclk" and "phy". > +- resets: Must contain an entry for each entry in reset-names. > + See ../../reset/reset.txt for details. > +- reset-names: Should be "phy". > + > +See nvmem.txt for more information. > + > +Example: > + otp: otp@ff290000 { > + compatible = "rockchip,px30-otp"; > + reg = <0x0 0xff290000 0x0 0x4000>; > + #address-cells = <1>; > + #size-cells = <1>; > + clocks = <&cru SCLK_OTP_USR>, <&cru PCLK_OTP_NS>, > + <&cru PCLK_OTP_PHY>; > + clock-names = "otp", "apb_pclk", "phy"; > + }; >