From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751207AbeAVU4w (ORCPT ); Mon, 22 Jan 2018 15:56:52 -0500 Received: from mail-qt0-f178.google.com ([209.85.216.178]:38678 "EHLO mail-qt0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750977AbeAVU4u (ORCPT ); Mon, 22 Jan 2018 15:56:50 -0500 X-Google-Smtp-Source: AH8x22464v+dRaFrRw806RpLHK3DF5bwYSemQC6kMNmty5zh93tizyVSBeLENgp4ONDCFwNAq0vmug== Subject: Re: [PATCHv4 1/5] net: dsa: Support internal phy on 'cpu' port To: Andrew Lunn Cc: Sebastian Reichel , Vivien Didelot , Shawn Guo , Sascha Hauer , Fabio Estevam , Ian Ray , Nandor Han , Rob Herring , "David S. Miller" , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20180116101958.19711-1-sebastian.reichel@collabora.co.uk> <20180116101958.19711-2-sebastian.reichel@collabora.co.uk> <09a9c406-85c1-0f84-4032-db243f825ca2@gmail.com> <20180122205459.GF2467@lunn.ch> From: Florian Fainelli Message-ID: <3b7fa162-20f9-b31c-b61b-07066fefd196@gmail.com> Date: Mon, 22 Jan 2018 12:56:44 -0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <20180122205459.GF2467@lunn.ch> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 01/22/2018 12:54 PM, Andrew Lunn wrote: >> Note: there is still technically a misreprentation of how the PHY is >> "attached" to the network device. In your DTSes, you have to have the >> CPU port have a "phy-handle" to the internal PHY, while technically it >> should be the i210 which has a "phy-handle" property to that PHY, and >> even better, if the e1000e/idb drivers were PHYLIB capable, they could >> manage it directly. > > Hi Florian > > Err, i don't think i agree. But maybe i'm missunderstanding. > > We have two back-to-back PHYs. I would expect the i210 MAC to have a > phy-handle pointing it its PHY. The CPU port would then point to the > internal switch PHY. Is it really a back-to-back PHY? If that is the case, ok, that can indeed work without magnetics, but this is really an inefficient way to connect a MAC to a switch, especially when you can do direct (R)GMII without any PHY in between... If that is the case, then disregard my comment. > > Or are you suggesting the i210 has two phy-handles, its own and the > switches? Not suggesting that, that would be weird. > > Andrew > -- Florian