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McKenney" , Boqun Feng , Shuah Khan , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-kselftest@vger.kernel.org, linux-riscv@lists.infradead.org, Shuah Khan References: <20250103040326.2603734-1-shorne@gmail.com> <44f202e8-dc35-40aa-8dc3-2f2e4c28feda@efficios.com> Content-Language: en-US From: Shuah Khan In-Reply-To: <44f202e8-dc35-40aa-8dc3-2f2e4c28feda@efficios.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit On 1/10/25 09:22, Mathieu Desnoyers wrote: > On 2025-01-02 23:03, Stafford Horne wrote: >> When working on OpenRISC support for restartable sequences I noticed >> and fixed these two issues with the riscv support bits. >> >>   1 The 'inc' argument to RSEQ_ASM_OP_R_DEREF_ADDV was being implicitly >>     passed to the macro.  Fix this by adding 'inc' to the list of macro >>     arguments. >>   2 The inline asm input constraints for 'inc' and 'off' use "er",  The >>     riscv gcc port does not have an "e" constraint, this looks to be >>     copied from the x86 port.  Fix this by just using an "r" constraint. >> >> I have compile tested this only for riscv.  However, the same fixes I >> use in the OpenRISC rseq selftests and everything passes with no issues. >> >> Signed-off-by: Stafford Horne > > Reviewed-by: Mathieu Desnoyers > If these are going through risc repo Acked-by: Shuah Khan If you would like me to take this, let me know. thanks, -- Shuah