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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: qrZaajzFtWHluNZJLFiWvSlQa7BT3Wyqw2IjH8CccvpX7pYUGUXoKA2Rs5nJ/E9Ojb3ArZDZxav/Q+tJhOaNYc/Mk4FXMAVUHj4iwiU8uZnQObqH8sfXeVHi0g0GxOM4h4XXJBMP+34lgiN1mczAPiJre+3HtSsXoTXJPELmAZ/S++4sAFvRYdUmxcnJTcTygcJK+LQFuMgJMscY7mMpyQXY2UOsJnGuPnFQjHcxsCgbpWKokYEPh0UHmDtWIOHInEGRC3yBgObfRENaYzBeN9uTzvWtlIuliislHVaI9AxHub5XwlfEM26uWYDiTX6ahsYaUqWCowxPdkOOMezAFlIronE6+Y77t3ztNeKk1lBgzFzuqyVXSOLDJypLtXzVpF6+QION5reUr8q1nkYzSEa+kNgwaV2sOZpmFKi6xQCmmIeWdMpc4SyKjPKzBD04 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Sep 2026 16:23:56.6301 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6f0e89da-f8d5-4a33-c331-08df1d7ce51d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CEB.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB5669 Gentle Ping On 11-08-2026 00:18, Swapnil Sapkal wrote: > The MBM (Memory Bandwidth Monitoring) and MBA (Memory Bandwidth > Allocation) resctrl selftests validate the bandwidth numbers reported by > resctrl against the memory controller performance counters. Today this > only works on Intel, where the counters are the iMC (Integrated Memory > Controller) PMUs and the tests are gated behind an ARCH_INTEL vendor > check. > > This series teaches the tests about the AMD UMC (Unified Memory > Controller) PMUs and enables MBM and MBA on AMD. > > The work is done in a few steps: > > 1. Rename the Intel specific imc/IMC identifiers to the generic > mc/MC so the code can serve both vendors. > > 2. Detect the vendor and select the memory controller PMU sysfs name > accordingly, keeping the rest of the code generic. > > 3. Add the AMD UMC support. Unlike Intel, the UMC PMU does not expose > the CAS command events via sysfs, so the read event is programmed > directly (EventCode 0x0a, umask 0x1). All vendor detection is > contained in num_of_mem_controllers() and dispatched to per-vendor > routines. On AMD each UMC is a per-NUMA-node PMU, so only the UMCs > local to the benchmark CPU are opened; remote-node UMCs would > otherwise fail perf_event_open() with -ENODEV. > > 4. Sweep the AMD MBA schemata using absolute bandwidth values (4 GB/s > to 40 GB/s) instead of the Intel style percentages (10% to 100%). > > 5. Extend the vendor_specific gate of the tests to Intel and AMD so > they run on AMD as well. The gate is kept (rather than removed) > so vendors that num_of_mem_controllers() does not know about are > skipped instead of reported as a failure. > > Testing > ------- > Tested on AMD Zen4 and Zen5 (multi-NUMA) system > > History > ------- > This series continues the work Babu Moger started; v1-v3 were posted by > Babu. I have taken it over, rebased it onto v7.2-rc7, addressed > Reinette's review feedback and added the AMD MBA bandwidth-value patch. > > v3: https://lore.kernel.org/all/cover.1718385426.git.babu.moger@amd.com/ > > Changes since v3 (per patch changelog is present in each patch): > - Rebased onto v7.2-rc7 and reworked for the upstream resctrl_val.c > refactor. > - Contained all vendor detection in num_of_mem_controllers() with a > shared helper for the common counter "type" read. (Reinette) > - Fixed remaining Intel specific naming and the ksft diagnostics. > (Reinette) > - Handled the AMD per-node UMC PMU topology (skip remote-node UMCs) to > fix perf_event_open() -ENODEV on multi-node systems. > - New patch: use absolute bandwidth values for the AMD MBA schemata, > with build-time checks that the sweep count matches the result arrays. > - Kept the vendor gate at Intel | AMD so unsupported vendors are skipped > rather than failed. > > Babu Moger (4): > selftests/resctrl: Rename variables and functions to generic names > selftests/resctrl: Detect vendor to select memory controller sysfs > name > selftests/resctrl: Add support for MBM and MBA tests on AMD > selftests/resctrl: Enable MBM and MBA tests on AMD > > Swapnil Sapkal (1): > selftests/resctrl: Use bandwidth values for AMD MBA schemata > > tools/testing/selftests/resctrl/mba_test.c | 105 +++-- > tools/testing/selftests/resctrl/mbm_test.c | 24 +- > tools/testing/selftests/resctrl/resctrl.h | 4 +- > tools/testing/selftests/resctrl/resctrl_val.c | 366 +++++++++++------- > 4 files changed, 320 insertions(+), 179 deletions(-) >