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Wed, 28 Oct 2026 05:58:48 -0700 (PDT) Received: from [192.168.226.26] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-c46bd77e1e9sm599765166b.67.2026.10.28.05.58.46 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 28 Oct 2026 05:58:47 -0700 (PDT) Message-ID: <3bd30903-5284-4bcc-b740-19635ec9bb71@oss.qualcomm.com> Date: Wed, 28 Oct 2026 13:58:45 +0100 X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] clk: qcom: gcc-glymur: use collapse-voting for PCIe GDSCs To: Taniya Das , Bjorn Andersson , Abel Vesa , Stephen Boyd , Brian Masney , Jerome Brunet , Dmitry Baryshkov Cc: Ajit Pandey , Imran Shaik , Jagadeesh Kona , Qiang Yu , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20261028-gcc_glymur_pcie-v1-1-a2163e1d2b9b@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20261028-gcc_glymur_pcie-v1-1-a2163e1d2b9b@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: 0HgFLEMIu-ePHTmCXpT-JavAHnSm05A2 X-Proofpoint-ORIG-GUID: 0HgFLEMIu-ePHTmCXpT-JavAHnSm05A2 X-Authority-Analysis: v=2.4 cv=Cssq4X4D c=1 sm=1 tr=0 ts=6ae1f189 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yx91gb_oNiZeI1HMLzn7:22 a=EUspDBNiAAAA:8 a=0I5sxNIOA4Q0ZI3ESucA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDI4MDA1MSBTYWx0ZWRfX1y21SXgmRKHB Fh1qH7GrjmhU4D0nblWyo4BEnywMNUBczfgIPSfEDLt0HmlOUuQxOEnQCK8YU69B8aaQ4yQvwlV 9zDcoGNAKFaGY5NAdUTlubPjoYIOMevg6radihx1TqbrMw3box8NOC/CF07CPqtpHAPBTz5Mf79 i28GcK4PnW1cSsaNEkdNR9Cc+Ft9aLbxntb8vCPOTdyGfCuAIhNyv1N3Lkdu8ly1gfnbW+60Jd+ L0GuEPG1vE5H31epGxjcsFjuAqaGzqhlnJeTYcM4VBwgnRpY81RCtkX3i4e+kIt0JguP0VAkxuP Tz8VXmF8hGlijm7EJsL8a1AqQdbD6KUOEdGuDyepTka1vI/7a9mZRKs2dAhd138sUTHjiWY2/lN u00z8NRLRONNOFppVTlLO+xsjnERZoxgo2BUMTk2fHd1Vsy9zpFP/4B8jjR0B9y7/sk9/WsCNhr 55fffXgesTm4uqmt91w== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDI4MDA1MSBTYWx0ZWRfX1XKNliyc7DXw zx/0Og9aXS5A+hxt1IME1eGn3ozJY9tDOL2O/GyjuDxkT4JMQwBMG+K5CBaB1+Ms1x1EPna09VF sNbLBYkRr18a1q5MyeQgU0dODz9N83Q= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.138,FMLib:17.12.100.49 definitions=2026-10-28_04,2026-10-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 impostorscore=0 malwarescore=0 bulkscore=0 phishscore=0 clxscore=1015 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610190000 definitions=main-2610280051 On 10/28/26 10:35 AM, Taniya Das wrote: > The PCIe GDSCs can be shared with other masters and should use the APCS > collapse-vote register when updating the power state. > > This is also needed to disable power domains that boot firmware enabled > through the vote register. > > Describe the collapse-vote register and mask for every PCIe and PCIe PHY > GDSC. > > Fixes: efe504300a17 ("clk: qcom: gcc: Add support for Global Clock Controller") > Signed-off-by: Taniya Das > --- Reviewed-by: Konrad Dybcio Konrad