From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 22B34C433DF for ; Wed, 20 May 2020 13:51:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id EB563207D4 for ; Wed, 20 May 2020 13:51:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726806AbgETNv1 (ORCPT ); Wed, 20 May 2020 09:51:27 -0400 Received: from foss.arm.com ([217.140.110.172]:56758 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726510AbgETNv0 (ORCPT ); Wed, 20 May 2020 09:51:26 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7A25530E; Wed, 20 May 2020 06:51:25 -0700 (PDT) Received: from [10.37.8.206] (unknown [10.37.8.206]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D2B023F52E; Wed, 20 May 2020 06:51:23 -0700 (PDT) Subject: Re: [PATCH V4 14/17] arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR2 register To: anshuman.khandual@arm.com, linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will@kernel.org, maz@kernel.org, mark.rutland@arm.com, linux-kernel@vger.kernel.org References: <1589881254-10082-1-git-send-email-anshuman.khandual@arm.com> <1589881254-10082-15-git-send-email-anshuman.khandual@arm.com> From: Suzuki K Poulose Message-ID: <3be71452-abd3-cd6f-c859-697447657a3f@arm.com> Date: Wed, 20 May 2020 14:56:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <1589881254-10082-15-git-send-email-anshuman.khandual@arm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/19/2020 10:40 AM, Anshuman Khandual wrote: > Enable EVT, BBM, TTL, IDS, ST, NV and CCIDX features bits in ID_AA64MMFR2 > register as per ARM DDI 0487F.a specification. > > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Mark Rutland > Cc: Suzuki K Poulose > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > > Suggested-by: Will Deacon > Signed-off-by: Anshuman Khandual Please note that there other series addressing TTL. So might have conflicts. Reviewed-by: Suzuki K Poulose