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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b734fa80e3fsm1096422766b.2.2025.11.17.05.17.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 17 Nov 2025 05:17:35 -0800 (PST) Message-ID: <3c0e994c-7484-432f-b3b1-bc7523d27242@oss.qualcomm.com> Date: Mon, 17 Nov 2025 14:17:32 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/2] pinctrl: qcom: sa8775p-lpass-lpi: Add SA8775P LPASS pinctrl To: Mohammad Rafi Shaik , Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Srinivas Kandagatla Cc: linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@oss.qualcomm.com, ajay.nandam@oss.qualcomm.com, ravi.hothi@oss.qualcomm.com References: <20251116171656.3105461-1-mohammad.rafi.shaik@oss.qualcomm.com> <20251116171656.3105461-3-mohammad.rafi.shaik@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20251116171656.3105461-3-mohammad.rafi.shaik@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTE3MDExMyBTYWx0ZWRfX6NbeiD9SlSIl pwzR6+ceKpaz5ApXwHi2hvuBNLFFgrrNE6lrkIEM5DLEjYvKGv1L6Wq9Bov+RdA6o5p0KI1cmXB Ap0Y9gPBmqXdtjxkaLSEvI6aQn3Vhs9tbIX3qQbNi7wXEqHPjQOT0CtVCo2HcwM20WtQ7eWpz6E KECS9eQZzJzYlU+64dE1N7Xa0zFt5bstpaWXvrHBQJX9gsaG7c9aPtgl7Jsk5HWVQTRpgGwIuwH jhf2w8J3QzkJkKh20aqjf+xyzGWdfcN7QF61vUIHSOI0rt5PqGP1nRPbdo/D5iWrBnrmkboALKf 4Lf6IvEUWME+pMGuKjOgw7WiS6CaJZnoW0hAyJfkfRSqReLBX+/WqJLu+qN75Ha7u06MFWsvmR7 yQ1P+yaPcunNu8cuRPwRQzE2pG/o0A== X-Proofpoint-GUID: 10j1U4gCgpLyyKOQI4yh36QqkGYdxfGT X-Proofpoint-ORIG-GUID: 10j1U4gCgpLyyKOQI4yh36QqkGYdxfGT X-Authority-Analysis: v=2.4 cv=Pb7yRyhd c=1 sm=1 tr=0 ts=691b2070 cx=c_pps a=JbAStetqSzwMeJznSMzCyw==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=WETcAnRWB3L6IxRwBe8A:9 a=QEXdDO2ut3YA:10 a=uxP6HrT_eTzRwkO_Te1X:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-17_03,2025-11-13_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 adultscore=0 lowpriorityscore=0 spamscore=0 clxscore=1015 priorityscore=1501 suspectscore=0 bulkscore=0 impostorscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511170113 On 11/16/25 6:16 PM, Mohammad Rafi Shaik wrote: > Add pin control support for Low Power Audio SubSystem (LPASS) > of Qualcomm SA8775P SoC. > > Signed-off-by: Mohammad Rafi Shaik > --- [...] > +static const struct lpi_pingroup sa8775p_groups[] = { > + LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _), > + LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _), > + LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _), > + LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _), > + LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _), > + LPI_PINGROUP(5, 12, swr_rx_data, ext_mclk1_c, qua_mi2s_data, _), > + LPI_PINGROUP(6, LPI_NO_SLEW, dmic1_clk, i2s1_clk, _, _), > + LPI_PINGROUP(7, LPI_NO_SLEW, dmic1_data, i2s1_ws, _, _), > + LPI_PINGROUP(8, LPI_NO_SLEW, dmic2_clk, i2s1_data, _, _), > + LPI_PINGROUP(9, LPI_NO_SLEW, dmic2_data, i2s1_data, ext_mclk1_b, _), > + LPI_PINGROUP(10, 16, i2s2_clk, wsa_swr_clk, _, _), > + LPI_PINGROUP(11, 18, i2s2_ws, wsa_swr_data, _, _), > + LPI_PINGROUP(12, LPI_NO_SLEW, dmic3_clk, i2s4_clk, _, _), > + LPI_PINGROUP(13, LPI_NO_SLEW, dmic3_data, i2s4_ws, ext_mclk1_a, _), > + LPI_PINGROUP(14, 6, swr_tx_data, ext_mclk1_d, _, _), > + LPI_PINGROUP(15, 20, i2s2_data, wsa2_swr_clk, _, _), > + LPI_PINGROUP(16, 21, i2s2_data, wsa2_swr_data, _, _), The max slew rate value (shift) here defined in the register map is 18 for this platform Konrad