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[77.136.35.189]) by smtp.googlemail.com with ESMTPSA id a125-v6sm2213922wmf.8.2018.11.21.14.12.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Nov 2018 14:12:11 -0800 (PST) Subject: Re: [PATCH 4/4] base/drivers/topology: Default dmpis-mhz if they are not set in DT To: Viresh Kumar Cc: rjw@rjwysocki.net, vincent.guittot@linaro.org, linux-kernel@vger.kernel.org, Chris Redpath , Quentin Perret , Amit Kucheria , Nicolas Dechesne , Niklas Cassel , Greg Kroah-Hartman , "Rafael J. Wysocki" References: <1540830201-2947-1-git-send-email-daniel.lezcano@linaro.org> <1540830201-2947-4-git-send-email-daniel.lezcano@linaro.org> <20181030085845.az2dstibnrcl7im4@vireshk-i7> From: Daniel Lezcano Message-ID: <3c3890d2-8b46-797d-328f-bd5dee11b22d@linaro.org> Date: Wed, 21 Nov 2018 23:12:09 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <20181030085845.az2dstibnrcl7im4@vireshk-i7> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 30/10/2018 09:58, Viresh Kumar wrote: > s/dmpis/dmips/ in $subject > > On 29-10-18, 17:23, Daniel Lezcano wrote: >> In the case of assymetric SoC with the same micro-architecture, we > > asymmetric ? > >> have a group of CPUs with smaller OPPs than the other group. One >> example is the 96boards dragonboard 820c. There is no dmips/MHz >> difference between both groups, so no need to specify the values in >> the DT. Unfortunately, without these defined, there is no scaling >> capacity comutation triggered, so we need to write > > computation > >> 'capacity-dmips-mhz' for each CPU with the same value in order to >> force the scaled capacity computation. >> >> Fix this by setting a default capacity to SCHED_CAPACITY_SCALE, if no >> 'capacity-dmips-mhz' is defined in the DT. >> >> This was tested on db820c: >> - specified values in the DT (correct results) >> - partial values defined in the DT (error + fallback to defaults) >> - no specified values in the DT (correct results) >> >> correct results are: >> cat /sys/devices/system/cpu/cpu*/cpu_capacity >> 758 >> 758 >> 1024 >> 1024 >> >> ... respectively for CPU0, CPU1, CPU2 and CPU3. >> >> That reflects the capacity for the max frequencies 1593600 and 2150400. >> >> Cc: Chris Redpath >> Cc: Quentin Perret >> Cc: Viresh Kumar >> Cc: Amit Kucheria >> Cc: Nicolas Dechesne >> Cc: Niklas Cassel >> Signed-off-by: Daniel Lezcano >> --- >> drivers/base/arch_topology.c | 27 ++++++++++++++++++++++++++- >> 1 file changed, 26 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c >> index 7311641..7d594a6 100644 >> --- a/drivers/base/arch_topology.c >> +++ b/drivers/base/arch_topology.c >> @@ -205,6 +205,21 @@ static struct notifier_block init_cpu_capacity_notifier = { >> .notifier_call = init_cpu_capacity_callback, >> }; >> >> +static int topology_set_default_capacity(void) >> +{ >> + int cpu; >> + >> + raw_capacity = kzalloc(num_possible_cpus() * sizeof(*raw_capacity), >> + GFP_KERNEL); >> + if (!raw_capacity) >> + return -ENOMEM; >> + >> + for_each_possible_cpu(cpu) >> + raw_capacity[cpu] = SCHED_CAPACITY_SCALE; > > This isn't actually required as the value of raw_capacity isn't used > anymore after this point in code. Rather it is forcefully updated in > init_cpu_capacity_callback(): > > raw_capacity[cpu] = topology_get_cpu_scale(NULL, cpu) * > policy->cpuinfo.max_freq / 1000UL; > > Maybe it is better to allocate raw_capacity once at boot and use > another global variable as flag (raw_capacity is used as a flag right > now at many places). Can we keep the proposed change as is to simply fix the default value? I want to do a separate change with a raw_capacity rewrite and remove the workqueue freeing it. -- Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog