From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B67DC43142 for ; Tue, 26 Jun 2018 13:02:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id D2F7426ADC for ; Tue, 26 Jun 2018 13:02:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D2F7426ADC Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965250AbeFZNCJ (ORCPT ); Tue, 26 Jun 2018 09:02:09 -0400 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:43417 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S965052AbeFZNCH (ORCPT ); Tue, 26 Jun 2018 09:02:07 -0400 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w5QCwsKf024513; Tue, 26 Jun 2018 15:01:40 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2jumup8bth-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Tue, 26 Jun 2018 15:01:40 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 45B2D42; Tue, 26 Jun 2018 13:01:38 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E9BBD2A98; Tue, 26 Jun 2018 13:01:37 +0000 (GMT) Received: from [10.201.21.58] (10.75.127.50) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Tue, 26 Jun 2018 15:01:37 +0200 Subject: Re: [PATCH 0/3] Add STM32 SPI support on stm32mp157c To: Amelie Delaunay , Maxime Coquelin , Rob Herring , Mark Rutland , Russell King , Arnd Bergmann CC: , , References: <1526566904-24514-1-git-send-email-amelie.delaunay@st.com> From: Alexandre Torgue Message-ID: <3cad9448-3e19-b686-8f90-d9c2c9928450@st.com> Date: Tue, 26 Jun 2018 15:01:18 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.7.0 MIME-Version: 1.0 In-Reply-To: <1526566904-24514-1-git-send-email-amelie.delaunay@st.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [10.75.127.50] X-ClientProxiedBy: SFHDAG8NODE1.st.com (10.75.127.22) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-06-26_07:,, signatures=0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Amélie, On 05/17/2018 04:21 PM, Amelie Delaunay wrote: > This patch adds STM32 SPI support on stm32mp157c SoC. > SPI1, available on GPIO expansion connector, is kept disabled, so these > pins can be used as GPIOs by default. > > Amelie Delaunay (3): > ARM: dts: stm32: add STM32 SPI support on stm32mp157c > ARM: dts: stm32: add SPI1 support on stm32mp157c-ev1 > ARM: multi_v7_defconfig: enable STM32 SPI > > arch/arm/boot/dts/stm32mp157-pinctrl.dtsi | 16 +++++- > arch/arm/boot/dts/stm32mp157c-ev1.dts | 6 +++ > arch/arm/boot/dts/stm32mp157c.dtsi | 84 +++++++++++++++++++++++++++++++ > arch/arm/configs/multi_v7_defconfig | 1 + > 4 files changed, 106 insertions(+), 1 deletion(-) > DT patches applied on stm32-next. Thanks Alex