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charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=QbvzLcbv c=1 sm=1 tr=0 ts=6ad0c49a cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=eoimf2acIAo5FJnRuUoq:22 a=VwQbUJbxAAAA:8 a=3-RhneuVAAAA:8 a=EUspDBNiAAAA:8 a=0e7TjCIZWrtQGaCp0SkA:9 a=QEXdDO2ut3YA:10 a=ZXulRonScM0A:10 a=bTQJ7kPSJx9SKPbeHEYW:22 a=VLVLkjT_5ZicWzSuYqSo:22 X-Proofpoint-Spam-Info: AW1haW4tMjYxMDE1MDA0OCBTYWx0ZWRfXymumlaS/TZE+ 4a2yBgFBerzqjci/Jp6pfxeUxj8Z6khsdP9ZHdS3IZgk+bc1TzOzpOH0bh06pucHu/DYUWic/wu rkByH1iHZFakYzCEbw7u/fgG59f4Y4g= X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDE1MDA0OCBTYWx0ZWRfX4a1nweKa7qCQ JJBbxXXKB+y8V5sYFSUNICLS85CIi4g/j46v67M66jtezDHFPI1B9KZiTMurFU+53pbMVCzbV2W 6ZLApxVsFXH2kEbk/wtmAqU1/BAesoFOcrtaJtU/qjhZ+AMlS8ZJBM0+0/1qHL15tyvmjBdKL0a ZYW01dlaYJq6tO+kouh1ealPyGytHgAjmnk6plC/hzQdLXxwbJr0+LGxBPlroQxEyKp3oczp/WQ HxFySGbXjjZgTqDdqOwPbou6uJIfHsKSwGZGpZRdw/FkBGLVXDM0KClbT/fPWh7dhgDVSB6G9cF XdaLBiMAA9CMmSBdamJQg5VTFtErNmNaeAW0u24Dt7xnSHw4f+Lr1ji40OQ5LTddBlODsvDWe9w icMEmjyEdYLQrGorVKDed7kZ9gCJ1DhuHhzH81rM+6ZP4bxiMk+iaCcgf24rPKJD0zUa+fAH8Hh bazHlDQ0WEpNJG1EwCA== X-Proofpoint-ORIG-GUID: wjeX-c7AsBIqcgMt0Worljo3qK18T87t X-Proofpoint-GUID: wjeX-c7AsBIqcgMt0Worljo3qK18T87t X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-14_01,2026-10-14_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 clxscore=1015 malwarescore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 bulkscore=0 phishscore=0 suspectscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2610080000 definitions=main-2610150048 On 8/31/26 11:55 AM, Xilin Wu wrote: > Add the missing tlmm pinctrl states for the SC8280XP QUP engines so common > I2C, SPI and UART pinmux definitions are available from the SoC dtsi. > Populate all 24 engines using the SC8280XP lane-to-GPIO mapping, including > the non-linear QUP instances, and keep the mux function names aligned with > the driver-supported qup0..qup23 names. [...] > + qup_uart0_default: qup-uart0-default-state { > + cts-pins { > + pins = "gpio135"; > + function = "qup0"; > + bias-bus-hold; > + }; > + rts-pins { Please keep a \n between each subnode, there's a new tool in town that will be very grumpy if you don't: https://lore.kernel.org/linux-arm-msm/cover.1790892852.git.waqar.hameed@axis.com/ https://lore.kernel.org/linux-arm-msm/e869c2bb5005830c9ac1d4bf998696ffc4eed335.1790892852.git.waqar.hameed@axis.com/ with that: Reviewed-by: Konrad Dybcio Konrad