From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-ed1-f50.google.com (mail-ed1-f50.google.com [209.85.208.50]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7922835FF5E for ; Thu, 18 Dec 2025 16:26:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.50 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766075195; cv=none; b=B7dm2mkwi3XetWrw1TNXOQ5VVeJvCUVxx+qokOzIfKBn5mCmj06+8plf6Tg+xmC2ybBRUAV/x8amQNImR94VmDKOE6mDqvTQqUhO+mcT7U5OFyUW+Kp5UXS6gvml2fThpFIVlRGgavCZaGqwa0HR0+bwwWLXvZtm8Xv1NsAfbQY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766075195; c=relaxed/simple; bh=PajlIvKA+qiiCxxbkeQoomgkXm+Xqzq2c9FCKYw1Apg=; h=Message-ID:Date:MIME-Version:Subject:To:Cc:References:From: In-Reply-To:Content-Type; b=mOlmgHcbY1YqeOepT71dFR5VSQHj3aK+eEg+rtit9y6loODl5iljYuj5PJStsuT2PeeTiPRUgSaptvB6H6vHCpx4vd1/xyb/OhFIE1XrDFQLQvVupH5g13H/S8Nh0yJWBBuI2kU69s1u5Tmcqnx8ySyrWnAb257wYS+kv36lWy4= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=eqGXJ3aw; arc=none smtp.client-ip=209.85.208.50 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="eqGXJ3aw" Received: by mail-ed1-f50.google.com with SMTP id 4fb4d7f45d1cf-64b4b35c812so1100841a12.0 for ; Thu, 18 Dec 2025 08:26:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1766075192; x=1766679992; darn=vger.kernel.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=qJpFHTDEzB05X66xrFgKLfHjWEJGjQ85HofDR0VslZY=; b=eqGXJ3awRUCimyHgzYyoF6TX+EfDSEtgW+vggGSJP/2fH/i/WKBGvvLr2S4y78GEbD JswScrbmzPEpgkWa9OZR/nEX/GBwIxsqcO6rMO8RjkZ4Gg6xUcNNZ5trt4XfmKEzIAa+ oSfYbLNNg3IMUZtAnr+M5zoYNupn5DdoCPkdS6VLLdgi89A5oAhHtyPha0pw9lFvWf6J G5DEyGM39HzPRBZT0DRW2B/EqG01XvVLbq5ZCLzPFT3EI2mWKI7QrEy4CHDuftWbR0Oz aqmcp+61MmAGjxqbWRvADangFSoYbQVdEE4/ionHoTkCRhWJA4vqh0lsaf8P0fjtP4iT 8/+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1766075192; x=1766679992; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=qJpFHTDEzB05X66xrFgKLfHjWEJGjQ85HofDR0VslZY=; b=CgegA94W/hn3at/G9wgy1iDqDNyqg9yin8K2zvZT4iUTYJ/3dABHbJveJ+/rlSI7+V /Ni1nrr0OCxXchnlMEJEpD0bjeH27PEib0KJ/fRueMHAQEb+9UY91r+xSCJ/PijoTunh sFjkOvB1+M0tHT5mSFVKPyzcaypHMalc5ImZPCehT2saKsp88snRV86YuEDmsJgZ2IvE ViYjl3lzTZckLk3FBEByNH+D/44xqJuhdd0jl5SkyRh5azbhaGkpl0KYcp/guHJRV0iU zZXVMi5PQaBRMWgUbNhGWWVe+P+xCgcBdtgwp0PxSoyOAXtxTkcq8MiBameE5DtIMEx1 N4Rw== X-Forwarded-Encrypted: i=1; AJvYcCW52DwTflbAl49I3lWauT4iR98Rf4T+Vf+nY24oXNTS6hjSXJ1XP0nKFTtj2/+s37yk5Mn+EZWKQcZkwpY=@vger.kernel.org X-Gm-Message-State: AOJu0YzMzSrTOtDwg5oZciH1dhYbMOMRxO6tOtIOmI80BXE9n399SlTD Vwa+QHPWIHKpMrCuPy9MbqCnyBvKrbsHpf6vrBF/+51wVQWfrLIU9klG X-Gm-Gg: AY/fxX73/0I2oxoCdpzG0vEUTd6vVYeaaj4oOD/WmEbxxEei9Qm//EePJZBMFwzrdEl Rot1Ti0wOuDlaLqtXXfjKXb/9ENg1fBQhC65OquWjY5KTyASWbhu/tLXFZVUmcKViCPh0PrqZPS yCKStM5OLGFly1mZkuDndgVUNtiG2l5q+fzZDFytGA2f0pLnc39KT02NK7JDBW6dR9gYfXZEJ1I rYGpcfz5UtpA0CRVDww0VXj2+qkvj07sdSbNBelPIzjCXKF+3v4j3judNSn+4IVxc41+WBWaaXx AK/e2C5E3FLSJ9DII8wF53lPvXMkAYiVun8C/hIImGb9Z6Ozu2MBw98EjTSTQT4MvHX296kq0vb Dd5iZmlz2EeoVgnwsnTR9pIETRHQbIoakTGxRV/VS1l9wPaXsvwLIFuL5adbIoXctkJUM+XRaWG tH3lU0BhZeghgZAkVAtZ3gVnYUh8DL1TnOGOTSA6Yx+A== X-Google-Smtp-Source: AGHT+IEiLlrNwayE/OEejVPPibTN9DbqbxeQkY7CK+E1iqQkD32NejUfdbwg4BUX3IiK49c125TzrA== X-Received: by 2002:a17:907:3fa7:b0:b72:5d08:486c with SMTP id a640c23a62f3a-b7d23a9d458mr2400079666b.27.1766075191457; Thu, 18 Dec 2025 08:26:31 -0800 (PST) Received: from [10.25.219.74] ([128.77.115.158]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b802350dac6sm270774666b.65.2025.12.18.08.26.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 18 Dec 2025 08:26:31 -0800 (PST) Message-ID: <3e449b21-5ffb-4a6a-b0c4-e9f381334883@gmail.com> Date: Thu, 18 Dec 2025 08:26:34 -0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] arm64: dts: freescale: imx95: Add support for i.MX95 15x15 FRDM board To: Lei Xu , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, justin.jiang@nxp.com, qijian.guo@nxp.com References: <20251217-127-v2-0-67cb12e56242@nxp.com> <20251217-127-v2-2-67cb12e56242@nxp.com> Content-Language: en-US From: Laurentiu Mihalcea In-Reply-To: <20251217-127-v2-2-67cb12e56242@nxp.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On 12/17/2025 9:56 PM, Lei Xu wrote: > The i.MX95 15x15 FRDM board is a compact and cost-effective development > platform based on the i.MX95 applications processor. > > Add device tree support for this board, including: > - LPUART1 and LPUART5 > - NETC > - USB > - PCIe > - uSDHC1, uSDHC2 and uSDHC3 > - FlexCAN2 and FlexCAN5 > - LPI2C2, LPI2C3, LPI2C4 and their child nodes > - Watchdog3 > > Signed-off-by: Lei Xu > --- > Changes in v2: > - Switched from 'xceiver-supply' to CAN PHY nodes using 'phys'. > - Added CAN PHY nodes for flexcan2/5 with shared silent-gpio, removed reg_can_stby. > - Updated MSI/IOMMU mapping comment to match the i.MX95 15x15 FRDM board. > --- > arch/arm64/boot/dts/freescale/Makefile | 1 + > arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts | 963 +++++++++++++++++++++ > 2 files changed, 964 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index f30d3fd724d0..71308d19d35e 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -400,6 +400,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb > dtb-$(CONFIG_ARCH_MXC) += imx93-var-som-symphony.dtb > dtb-$(CONFIG_ARCH_MXC) += imx943-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-evk.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx95-15x15-frdm.dtb > dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx95-19x19-evk-sof.dtb > dtb-$(CONFIG_ARCH_MXC) += imx95-toradex-smarc-dev.dtb > diff --git a/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts > new file mode 100644 > index 000000000000..414ebdacc3cb > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx95-15x15-frdm.dts > @@ -0,0 +1,963 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright 2025 NXP > + */ > + > +/dts-v1/; > + > +#include > +#include > +#include > +#include > +#include "imx95.dtsi" > + > +#define BRD_SM_CTRL_SD3_WAKE 0x8000 /*!< PCAL6408A-0 */ > +#define BRD_SM_CTRL_PCIE1_WAKE 0x8001 /*!< PCAL6408A-4 */ > +#define BRD_SM_CTRL_BT_WAKE 0x8002 /*!< PCAL6408A-5 */ > +#define BRD_SM_CTRL_PCIE2_WAKE 0x8003 /*!< PCAL6408A-6 */ > +#define BRD_SM_CTRL_BUTTON 0x8004 /*!< PCAL6408A-7 */ > + > +/ { > + compatible = "fsl,imx95-15x15-frdm", "fsl,imx95"; > + model = "NXP i.MX95 15X15 FRDM board"; > + > + aliases { > + ethernet0 = &enetc_port0; > + ethernet1 = &enetc_port1; > + gpio0 = &gpio1; > + gpio1 = &gpio2; > + gpio2 = &gpio3; > + gpio3 = &gpio4; > + gpio4 = &gpio5; > + i2c0 = &lpi2c1; > + i2c1 = &lpi2c2; > + i2c2 = &lpi2c3; > + i2c3 = &lpi2c4; > + i2c4 = &lpi2c5; > + i2c5 = &lpi2c6; > + i2c6 = &lpi2c7; > + i2c7 = &lpi2c8; > + mmc0 = &usdhc1; > + mmc1 = &usdhc2; > + mmc2 = &usdhc3; > + serial0 = &lpuart1; > + serial4 = &lpuart5; > + }; > + > + (snip) > + > + sound-micfil { > + compatible = "fsl,imx-audio-card"; > + model = "micfil-audio"; > + > + pri-dai-link { > + link-name = "micfil hifi"; > + format = "i2s"; > + > + cpu { > + sound-dai = <&micfil>; > + }; please add a space in between the definitions of the cpu and codec nodes. With that: Reviewed-by: Laurentiu Mihalcea > + codec { > + sound-dai = <&dmic>; > + }; > + }; > + }; > + > + usdhc3_pwrseq: usdhc3-pwrseq { > + compatible = "mmc-pwrseq-simple"; > + reset-gpios = <&pcal6524 8 GPIO_ACTIVE_LOW>; > + };