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Tue, 17 Sep 2024 08:40:23 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 48H8eM2a032454 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 17 Sep 2024 08:40:22 GMT Received: from [10.204.67.70] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 17 Sep 2024 01:40:13 -0700 Message-ID: <3ea1189b-8b06-45bb-9d60-178f69ee407d@quicinc.com> Date: Tue, 17 Sep 2024 14:10:10 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/5] phy: qcom: edp: Introduce aux_cfg array for version specific aux settings Content-Language: en-US To: Dmitry Baryshkov CC: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , References: <20240913103755.7290-1-quic_mukhopad@quicinc.com> <20240913103755.7290-3-quic_mukhopad@quicinc.com> From: Soutrik Mukhopadhyay In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: EW7-YFs4rYSVK7VBeqBZUWpboj-UHtU3 X-Proofpoint-GUID: EW7-YFs4rYSVK7VBeqBZUWpboj-UHtU3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 suspectscore=0 bulkscore=0 lowpriorityscore=0 spamscore=0 clxscore=1015 mlxlogscore=999 adultscore=0 malwarescore=0 phishscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2408220000 definitions=main-2409170064 On 9/13/2024 5:12 PM, Dmitry Baryshkov wrote: > On Fri, 13 Sept 2024 at 13:38, Soutrik Mukhopadhyay > wrote: >> In order to support different HW versions, introduce aux_cfg array >> to move v4 specific aux configuration settings. >> >> Signed-off-by: Soutrik Mukhopadhyay >> --- >> v2: Fixed review comments from Bjorn and Dmitry >> - Made aux_cfg array as const. >> >> --- >> drivers/phy/qualcomm/phy-qcom-edp.c | 37 ++++++++++++++++++----------- >> 1 file changed, 23 insertions(+), 14 deletions(-) >> >> diff --git a/drivers/phy/qualcomm/phy-qcom-edp.c b/drivers/phy/qualcomm/phy-qcom-edp.c >> index da2b32fb5b45..bcd5aced9e06 100644 >> --- a/drivers/phy/qualcomm/phy-qcom-edp.c >> +++ b/drivers/phy/qualcomm/phy-qcom-edp.c >> @@ -90,6 +90,7 @@ struct phy_ver_ops { >> >> struct qcom_edp_phy_cfg { >> bool is_edp; >> + const u8 *aux_cfg; >> const struct qcom_edp_swing_pre_emph_cfg *swing_pre_emph_cfg; >> const struct phy_ver_ops *ver_ops; >> }; >> @@ -186,11 +187,15 @@ static const struct qcom_edp_swing_pre_emph_cfg edp_phy_swing_pre_emph_cfg = { >> .pre_emphasis_hbr3_hbr2 = &edp_pre_emp_hbr2_hbr3, >> }; >> >> +static const u8 edp_phy_aux_cfg_v4[10] = { >> + 0x00, 0x13, 0x24, 0x00, 0x0a, 0x26, 0x0a, 0x03, 0x37, 0x03 >> +}; >> + >> static int qcom_edp_phy_init(struct phy *phy) >> { >> struct qcom_edp *edp = phy_get_drvdata(phy); >> + u8 aux_cfg[10]; > Please define 10, so that there are no magic numbers (and less chance > of damaging the stack if it gets changed in one place only. Sure, we will update this in the next version. > >> int ret; >> - u8 cfg8; >> >> ret = regulator_bulk_enable(ARRAY_SIZE(edp->supplies), edp->supplies); >> if (ret) >> @@ -200,6 +205,8 @@ static int qcom_edp_phy_init(struct phy *phy) >> if (ret) >> goto out_disable_supplies; >> >> + memcpy(aux_cfg, edp->cfg->aux_cfg, sizeof(aux_cfg)); >> + >> writel(DP_PHY_PD_CTL_PWRDN | DP_PHY_PD_CTL_AUX_PWRDN | >> DP_PHY_PD_CTL_PLL_PWRDN | DP_PHY_PD_CTL_DP_CLAMP_EN, >> edp->edp + DP_PHY_PD_CTL); >> @@ -222,22 +229,20 @@ static int qcom_edp_phy_init(struct phy *phy) >> * even needed. >> */ >> if (edp->cfg->swing_pre_emph_cfg && !edp->is_edp) >> - cfg8 = 0xb7; >> - else >> - cfg8 = 0x37; >> + aux_cfg[8] = 0xb7; >> >> writel(0xfc, edp->edp + DP_PHY_MODE); >> >> - writel(0x00, edp->edp + DP_PHY_AUX_CFG0); >> - writel(0x13, edp->edp + DP_PHY_AUX_CFG1); >> - writel(0x24, edp->edp + DP_PHY_AUX_CFG2); >> - writel(0x00, edp->edp + DP_PHY_AUX_CFG3); >> - writel(0x0a, edp->edp + DP_PHY_AUX_CFG4); >> - writel(0x26, edp->edp + DP_PHY_AUX_CFG5); >> - writel(0x0a, edp->edp + DP_PHY_AUX_CFG6); >> - writel(0x03, edp->edp + DP_PHY_AUX_CFG7); >> - writel(cfg8, edp->edp + DP_PHY_AUX_CFG8); >> - writel(0x03, edp->edp + DP_PHY_AUX_CFG9); >> + writel(aux_cfg[0], edp->edp + DP_PHY_AUX_CFG0); >> + writel(aux_cfg[1], edp->edp + DP_PHY_AUX_CFG1); >> + writel(aux_cfg[2], edp->edp + DP_PHY_AUX_CFG2); >> + writel(aux_cfg[3], edp->edp + DP_PHY_AUX_CFG3); >> + writel(aux_cfg[4], edp->edp + DP_PHY_AUX_CFG4); >> + writel(aux_cfg[5], edp->edp + DP_PHY_AUX_CFG5); >> + writel(aux_cfg[6], edp->edp + DP_PHY_AUX_CFG6); >> + writel(aux_cfg[7], edp->edp + DP_PHY_AUX_CFG7); >> + writel(aux_cfg[8], edp->edp + DP_PHY_AUX_CFG8); >> + writel(aux_cfg[9], edp->edp + DP_PHY_AUX_CFG9); > Replace this with a loop? Can we use below approach for this : #define DP_PHY_AUX_CFG(n)        (0x24 + (0x04 * (n))) for (int i = 0; i < 10; i++)     writel(aux_cfg[i], edp->edp + DP_PHY_AUX_CFG(i)); > >> writel(PHY_AUX_STOP_ERR_MASK | PHY_AUX_DEC_ERR_MASK | >> PHY_AUX_SYNC_ERR_MASK | PHY_AUX_ALIGN_ERR_MASK | >> @@ -519,16 +524,19 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v4 = { >> }; >> >> static const struct qcom_edp_phy_cfg sc7280_dp_phy_cfg = { >> + .aux_cfg = edp_phy_aux_cfg_v4, >> .ver_ops = &qcom_edp_phy_ops_v4, >> }; >> >> static const struct qcom_edp_phy_cfg sc8280xp_dp_phy_cfg = { >> + .aux_cfg = edp_phy_aux_cfg_v4, >> .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg, >> .ver_ops = &qcom_edp_phy_ops_v4, >> }; >> >> static const struct qcom_edp_phy_cfg sc8280xp_edp_phy_cfg = { >> .is_edp = true, >> + .aux_cfg = edp_phy_aux_cfg_v4, >> .swing_pre_emph_cfg = &edp_phy_swing_pre_emph_cfg, >> .ver_ops = &qcom_edp_phy_ops_v4, >> }; >> @@ -707,6 +715,7 @@ static const struct phy_ver_ops qcom_edp_phy_ops_v6 = { >> }; >> >> static struct qcom_edp_phy_cfg x1e80100_phy_cfg = { >> + .aux_cfg = edp_phy_aux_cfg_v4, >> .swing_pre_emph_cfg = &dp_phy_swing_pre_emph_cfg, >> .ver_ops = &qcom_edp_phy_ops_v6, >> }; >> -- >> 2.17.1 >> >