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Mon, 20 Jul 2026 23:45:24 -0700 (PDT) X-Received: by 2002:a17:90a:e7c5:b0:38e:4114:d8c7 with SMTP id 98e67ed59e1d1-38e4b244fdfmr16462422a91.0.1784616323664; Mon, 20 Jul 2026 23:45:23 -0700 (PDT) Received: from [10.218.35.45] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-38e9218a25esm942198a91.15.2026.07.20.23.45.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 20 Jul 2026 23:45:23 -0700 (PDT) Message-ID: <3eb742e3-6381-47d9-9f16-c08915963748@oss.qualcomm.com> Date: Tue, 21 Jul 2026 12:15:17 +0530 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: eliza-evk: Add PCIe1 with TC9563 PCIe switch To: Manivannan Sadhasivam Cc: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-pm@vger.kernel.org References: <20260708-eliza_evk-v2-0-c599246ceba1@oss.qualcomm.com> <20260708-eliza_evk-v2-2-c599246ceba1@oss.qualcomm.com> <76288f31-57ea-4a42-ad50-8504d8eccfa0@oss.qualcomm.com> <2xz7madb3jkifwjwziozuudx3s57g25my3j6ucwjzbguacpgyn@btyrkbzqzh4a> Content-Language: en-US From: Krishna Chaitanya Chundru In-Reply-To: <2xz7madb3jkifwjwziozuudx3s57g25my3j6ucwjzbguacpgyn@btyrkbzqzh4a> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: E1ZEJsX8pVxAtYTq39IZp8nwlNkGDSMw X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNzIxMDA2OCBTYWx0ZWRfX+sAxX1pY3sOK MbqVLTYpu0uS/JOcpjPyg37JrDB/4w5a3f+TxESdkeGQI5XbCQcpRExT1EiR1R8xN1xvQbvUwq9 9nyWdOUUlozH0eP7ML9iK8f2hGRWRItaPe1PQUlOcoARR+RKXnqRxtLdZ6Fb4I04OZSEN0waWVS ujvVsCemR+kzy+9YbUMXqPowv69wQYwLM/iLBfUY9RnyQwr42T+jkZhTikYTLqNuhvedZSms8Wm mejdsql6I65sficFrn7MxmZEaOKBirEuBT8sOxa+i7bDd12ruTv70o50jU/auOgJjnF7aOp9JWv 6I3BVUzQaS9hwbmQSGBeViLoOZi0aWUOJ5krhqmojoJUIiX55RJfBLhq/plVeHUXyob7a6hocc3 5HMOiGqOXxLQvzgmIT9AsCgWgLiew+S3mKCvnnp6Yu64huWvQ/hDIB2qcaJqiAEtRwP4uaAEHL3 ZlxrzXMQwczxvGA238w== X-Proofpoint-Spam-Info: AW1haW4tMjYwNzIxMDA2OCBTYWx0ZWRfX2s3OxDf9hC/L yWiVDtqZoDuFldYKNzx9p6eWHhzvBGX1DV6f+DQkjoa1R7eoM32v702Y+x2Vw/e3D8lmsRb3lnK WFXaPWVfgmx/dE1LM4tLUZDrzEwZfX4= X-Authority-Analysis: v=2.4 cv=daawG3Xe c=1 sm=1 tr=0 ts=6a5f1586 cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=RAioF0-LDSMA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=RVf7_9FWgS9vKL4VWr8A:9 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-GUID: E1ZEJsX8pVxAtYTq39IZp8nwlNkGDSMw X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-07-20_06,2026-07-20_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 impostorscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 clxscore=1015 adultscore=0 spamscore=0 lowpriorityscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2607210068 On 7/21/2026 11:52 AM, Manivannan Sadhasivam wrote: > On Tue, Jul 21, 2026 at 10:56:20AM +0530, Krishna Chaitanya Chundru wrote: >> >> On 7/9/2026 6:37 PM, Manivannan Sadhasivam wrote: >>> On Wed, Jul 08, 2026 at 11:47:17AM +0530, Krishna Chaitanya Chundru wrote: >>>> The Eliza EVK board connects PCIe1 (8GT/s x2) to a Toshiba TC9563 >>>> PCIe switch. Enable PCIe1 and its QMP PHY nodes. >>>> >>>> TC9563 uses I2C (at address 0x77 on I2C4) for its management interface. >>>> >>>> Override the base iommu-map with the expanded set covering all the >>>> switch's downstream ports (0x1400-0x1408 SID range). >>>> >>>> The TC9563 RESX# and PERST# are OR-ed internally to assert reset on the >>>> switch. Use TC9563 RESX# pin via a TLMM GPIO and skip wiring PERST# >>>> from the PCIe controller. >>>> >>>> Signed-off-by: Krishna Chaitanya Chundru >>>> --- >>>> arch/arm64/boot/dts/qcom/eliza-evk.dtsi | 112 ++++++++++++++++++++++++++++++++ >>>> arch/arm64/boot/dts/qcom/eliza.dtsi | 1 + >>>> 2 files changed, 113 insertions(+) >>>> >>>> diff --git a/arch/arm64/boot/dts/qcom/eliza-evk.dtsi b/arch/arm64/boot/dts/qcom/eliza-evk.dtsi >>>> index 6d76715ccffb..e099b7c8c371 100644 >>>> --- a/arch/arm64/boot/dts/qcom/eliza-evk.dtsi >>>> +++ b/arch/arm64/boot/dts/qcom/eliza-evk.dtsi >>>> @@ -12,6 +12,26 @@ chosen { >>>> stdout-path = "serial0:115200n8"; >>>> }; >>>> >>>> + vreg_0p9: regulator-0v9 { >>>> + compatible = "regulator-fixed"; >>>> + regulator-name = "VREG_0P9"; >>>> + >>>> + regulator-min-microvolt = <900000>; >>>> + regulator-max-microvolt = <900000>; >>>> + regulator-always-on; >>>> + regulator-boot-on; >>>> + }; >>>> + >>>> + vreg_1p8: regulator-1v8 { >>>> + compatible = "regulator-fixed"; >>>> + regulator-name = "VREG_1P8"; >>>> + >>>> + regulator-min-microvolt = <1800000>; >>>> + regulator-max-microvolt = <1800000>; >>>> + regulator-always-on; >>>> + regulator-boot-on; >>>> + }; >>>> + >>>> vreg_pcie_m_3p3: regulator-3p3 { >>>> compatible = "regulator-fixed"; >>>> >>>> @@ -99,6 +119,98 @@ pcieport0_ep: endpoint { >>>> }; >>>> }; >>>> >>>> +&pcie1 { >>>> + iommu-map = <0x0 &apps_smmu 0x1400 0x1>, >>>> + <0x100 &apps_smmu 0x1401 0x1>, >>>> + <0x208 &apps_smmu 0x1402 0x1>, >>>> + <0x210 &apps_smmu 0x1403 0x1>, >>>> + <0x218 &apps_smmu 0x1404 0x1>, >>>> + <0x300 &apps_smmu 0x1405 0x1>, >>>> + <0x400 &apps_smmu 0x1406 0x1>, >>>> + <0x500 &apps_smmu 0x1407 0x1>, >>>> + <0x501 &apps_smmu 0x1408 0x1>; >>>> + >>>> + status = "okay"; >>>> +}; >>>> + >>>> +&pcie1_phy { >>>> + vdda-phy-supply = <&vreg_l1k>; >>>> + vdda-pll-supply = <&vreg_l3k>; >>>> + >>>> + status = "okay"; >>>> +}; >>>> + >>>> +&pcie1port0 { >>>> + wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; >>> No reset-gpios? >> RESX & PERST are ORed in this platform, as we can declare at only >> one place we declared it in the tc9563 node as resx-gpios >> > So this means, if both are defined, the assert/deassert sequence causes issue? > If so, this should be mentioned in the comment here. we can't claim the same gpio in two different drivers. the probe of the driver probing 2nd will fail as the gpio is already requested by the first driver. I will update the commit text while re-spining. - Krishna Chaitanya. > > - Mani >