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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: george.moussalem@outlook.com,
	"Uwe Kleine-König" <ukleinek@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Baruch Siach" <baruch@tkos.co.il>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Konrad Dybcio" <konradybcio@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-pwm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Devi Priya <quic_devipriy@quicinc.com>,
	Baruch Siach <baruch.siach@siklu.com>,
	Krzysztof Kozlowski <krzk@kernel.org>
Subject: Re: [PATCH v20 3/6] arm64: dts: qcom: ipq6018: add pwm node
Date: Wed, 4 Feb 2026 13:24:45 +0100	[thread overview]
Message-ID: <3ed170d0-3291-4cfb-b092-f4a1b2b0f96b@oss.qualcomm.com> (raw)
In-Reply-To: <20260204-ipq-pwm-v20-3-91733011a3d1@outlook.com>

On 2/4/26 12:25 PM, George Moussalem via B4 Relay wrote:
> From: Devi Priya <quic_devipriy@quicinc.com>
> 
> Describe the PWM block on IPQ6018.
> 
> Although PWM is in the TCSR area, make pwm its own node as simple-mfd
> has been removed from the bindings and as such hardware components
> should have its own node.
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Co-developed-by: Baruch Siach <baruch.siach@siklu.com>
> Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
> Signed-off-by: George Moussalem <george.moussalem@outlook.com>
> ---
>  arch/arm64/boot/dts/qcom/ipq6018.dtsi | 10 ++++++++++
>  1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> index 40f1c262126eff3761430a47472b52d27f961040..7866844cc09fd2c2c2f512ce2c8fa7826fabc7aa 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> @@ -413,6 +413,16 @@ tcsr: syscon@1937000 {
>  			reg = <0x0 0x01937000 0x0 0x21000>;
>  		};
>  
> +		pwm: pwm@1941010 {
> +			compatible = "qcom,ipq6018-pwm";
> +			reg = <0x0 0x01941010 0x0 0x20>;
> +			clocks = <&gcc GCC_ADSS_PWM_CLK>;
> +			assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>;
> +			assigned-clock-rates = <100000000>;
> +			#pwm-cells = <3>;
> +			status = "disabled";

I don't think there's a reason to disable it by default, but given the
version this patchset is on, I'll be happy to see a post-merge fixup

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>

Konrad

  reply	other threads:[~2026-02-04 12:24 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-04 11:25 [PATCH v20 0/6] Add PWM support for IPQ chipsets George Moussalem via B4 Relay
2026-02-04 11:25 ` [PATCH v20 1/6] dt-bindings: pwm: add IPQ6018 binding George Moussalem via B4 Relay
2026-02-04 11:25 ` [PATCH v20 2/6] pwm: driver for qualcomm ipq6018 pwm block George Moussalem via B4 Relay
2026-04-02 15:35   ` Uwe Kleine-König
2026-04-03 10:40     ` George Moussalem
2026-04-04 21:09       ` Uwe Kleine-König
2026-04-07  5:58         ` George Moussalem
2026-02-04 11:25 ` [PATCH v20 3/6] arm64: dts: qcom: ipq6018: add pwm node George Moussalem via B4 Relay
2026-02-04 12:24   ` Konrad Dybcio [this message]
2026-02-04 11:25 ` [PATCH v20 4/6] arm64: dts: qcom: ipq5018: " George Moussalem via B4 Relay
2026-02-04 12:25   ` Konrad Dybcio
2026-02-04 11:25 ` [PATCH v20 5/6] arm64: dts: qcom: ipq5332: " George Moussalem via B4 Relay
2026-02-04 12:25   ` Konrad Dybcio
2026-02-04 11:25 ` [PATCH v20 6/6] arm64: dts: qcom: ipq9574: " George Moussalem via B4 Relay
2026-02-04 12:26   ` Konrad Dybcio

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