From: <Claudiu.Beznea@microchip.com>
To: <Kavyasree.Kotagiri@microchip.com>, <arnd@arndb.de>,
<alexandre.belloni@bootlin.com>,
<krzysztof.kozlowski+dt@linaro.org>, <soc@kernel.org>,
<robh+dt@kernel.org>, <Nicolas.Ferre@microchip.com>
Cc: <linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<UNGLinuxDriver@microchip.com>
Subject: Re: [PATCH] ARM: dts: lan966x: Cleanup flexcom3 usart pinctrl settings.
Date: Fri, 1 Jul 2022 08:32:36 +0000 [thread overview]
Message-ID: <3ef4a858-9534-0b4f-744b-b254bb7555f2@microchip.com> (raw)
In-Reply-To: <20220627091217.21701-1-kavyasree.kotagiri@microchip.com>
On 27.06.2022 12:12, Kavyasree Kotagiri wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On pcb8291, Flexcom3 usart has only tx and rx pins.
> Cleaningup usart3 pinctrl settings.
>
> Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
> ---
> arch/arm/boot/dts/lan966x-pcb8291.dts | 18 ++++++------------
> 1 file changed, 6 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/boot/dts/lan966x-pcb8291.dts b/arch/arm/boot/dts/lan966x-pcb8291.dts
> index 3c7e3a7d6f14..5dc8ed4cee9a 100644
> --- a/arch/arm/boot/dts/lan966x-pcb8291.dts
> +++ b/arch/arm/boot/dts/lan966x-pcb8291.dts
> @@ -19,19 +19,13 @@
> };
>
> &gpio {
> - fc_shrd7_pins: fc_shrd7-pins {
> - pins = "GPIO_49";
> - function = "fc_shrd7";
> - };
> -
> - fc_shrd8_pins: fc_shrd8-pins {
> - pins = "GPIO_54";
> - function = "fc_shrd8";
> + fc3_b_rxd_pins: fc3-b-rxd-pins {
> + pins = "GPIO_52";
> + function = "fc3_b";
> };
>
> - fc3_b_pins: fcb3-spi-pins {
> - /* SCK, RXD, TXD */
> - pins = "GPIO_51", "GPIO_52", "GPIO_53";
> + fc3_b_txd_pins: fc3-b-txd-pins {
> + pins = "GPIO_53";
Could we keep both pins under the same node? As in case of can0_b_pins,
something like:
fc3_b_pins: fc3-b-pins {
pins = "GPIO_52", "GPIO_53";
function = "fc3_b";
};
Thank you,
Claudiu Beznea
> function = "fc3_b";
> };
>
> @@ -53,7 +47,7 @@
> status = "okay";
>
> usart3: serial@200 {
> - pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>;
> + pinctrl-0 = <&fc3_b_rxd_pins>, <&fc3_b_txd_pins>;
> pinctrl-names = "default";
> status = "okay";
> };
> --
> 2.17.1
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
prev parent reply other threads:[~2022-07-01 8:32 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-06-27 9:12 Kavyasree Kotagiri
2022-07-01 8:17 ` Nicolas Ferre
2022-07-01 8:32 ` Claudiu.Beznea [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=3ef4a858-9534-0b4f-744b-b254bb7555f2@microchip.com \
--to=claudiu.beznea@microchip.com \
--cc=Kavyasree.Kotagiri@microchip.com \
--cc=Nicolas.Ferre@microchip.com \
--cc=UNGLinuxDriver@microchip.com \
--cc=alexandre.belloni@bootlin.com \
--cc=arnd@arndb.de \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=robh+dt@kernel.org \
--cc=soc@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®