From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1615AC6FD18 for ; Thu, 20 Apr 2023 01:28:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230495AbjDTB2t (ORCPT ); Wed, 19 Apr 2023 21:28:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41852 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229687AbjDTB2r (ORCPT ); Wed, 19 Apr 2023 21:28:47 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C29AB19B5; Wed, 19 Apr 2023 18:28:46 -0700 (PDT) Received: from pps.filterd (m0279871.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 33K17LS6001952; Thu, 20 Apr 2023 01:28:40 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=message-id : date : mime-version : subject : to : cc : references : from : in-reply-to : content-type : content-transfer-encoding; s=qcppdkim1; bh=lgZ9M8eJHkyNZFew4ItZN0Kc4qPwcZwwCcblZpDhkP8=; b=ntHyU0ZWKWso+YAM1U254cx7oaU4WTNBzxoush1pqG3eUjYEn2vccpc03J1FGs4DeM3c V3KWXLumzR4KcFFvhqPMCre/Dpzo5R6cr+m6FKjemHxz+K9/BeXOpB1NVK2ffL2zFg9i ran4SmetSkQ/eWNqpCMlwFj95nXb6CkzPDHkbnWSIyPr23f9qs+wVLTi0dn490a9+IrV gdLGzaz2zzCQdPPTqulJnKBB2LD/0MjmBOIWgQhQblzMAr4eeh+DsgfnbnopuFgVVdZp VmcEB3v3NPObIlikCeaywB+3tP1y7mgmCuvKNQYb7wxPc/2HTHH0ilGcVCWRnpMz4nbD gw== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3q2p7arjq9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 20 Apr 2023 01:28:39 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 33K1ScrO006509 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 20 Apr 2023 01:28:38 GMT Received: from [10.110.74.190] (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.42; Wed, 19 Apr 2023 18:28:37 -0700 Message-ID: <3f3b3637-ed85-09a1-22b7-3ccd4bc929bb@quicinc.com> Date: Wed, 19 Apr 2023 18:28:36 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.2 Subject: Re: [PATCH 0/2] DPU1 GC1.8 wiring-up Content-Language: en-US To: Konrad Dybcio , Dmitry Baryshkov , Rob Clark , Sean Paul , David Airlie , Daniel Vetter CC: Marijn Suijten , , , , References: <20230420-topic-dpu_gc-v1-0-d9d1a5e40917@linaro.org> <5b133c55-e4f5-bfd2-b542-a7d44313c038@linaro.org> From: Abhinav Kumar In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Qd8TwURxdZx-a2K4lG8gRlfmjFcOP3fC X-Proofpoint-ORIG-GUID: Qd8TwURxdZx-a2K4lG8gRlfmjFcOP3fC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-04-19_16,2023-04-18_01,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 bulkscore=0 malwarescore=0 adultscore=0 phishscore=0 mlxscore=0 suspectscore=0 priorityscore=1501 mlxlogscore=756 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303200000 definitions=main-2304200008 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4/19/2023 6:26 PM, Konrad Dybcio wrote: > > > On 20.04.2023 03:25, Dmitry Baryshkov wrote: >> On 20/04/2023 04:14, Konrad Dybcio wrote: >>> Almost all SoCs from SDM845 to SM8550 inclusive feature a GC1.8 >>> dspp sub-block in addition to PCCv4. The other block differ a bit >>> more, but none of them are supported upstream. >>> >>> This series adds configures the GCv1.8 on all the relevant SoCs. >> >> Does this mean that we will see gamma_lut support soon? > No promises, my plate is not even full, it's beyond overflowing! :P > > Konrad So I think I wrote about this before during the catalog rework/fixes that the gc registers are not written to / programmed. If thats not done, is there any benefit to this series? >> >>> >>> Signed-off-by: Konrad Dybcio >>> --- >>> Konrad Dybcio (2): >>>        drm/msm/dpu1: Rename sm8150_dspp_blk to sdm845_dspp_blk >>>        drm/msm/dpu1: Enable GCv1.8 on many SoCs >>> >>>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h   | 16 ++++++++-------- >>>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h   | 16 ++++++++-------- >>>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h   |  4 ++-- >>>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h  |  4 ++-- >>>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h   | 16 ++++++++-------- >>>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 ++++++++-------- >>>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h   | 16 ++++++++-------- >>>   drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h   | 16 ++++++++-------- >>>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c           |  4 +++- >>>   9 files changed, 55 insertions(+), 53 deletions(-) >>> --- >>> base-commit: 3cdbc01c40e34c57697f8934f2727a88551696be >>> change-id: 20230420-topic-dpu_gc-6901f75768db >>> >>> Best regards, >>