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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2b9f0b21c4bsm19920335ad.29.2026.05.02.02.30.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 02 May 2026 02:31:01 -0700 (PDT) Message-ID: <3f649e2c-c6b6-4547-8920-23886074ef60@oss.qualcomm.com> Date: Sat, 2 May 2026 17:30:35 +0800 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] dt-bindings: ufs: Document static TX Equalization settings properties To: Conor Dooley Cc: bvanassche@acm.org, beanhuo@micron.com, peter.wang@mediatek.com, martin.petersen@oracle.com, mani@kernel.org, linux-scsi@vger.kernel.org, Alim Akhtar , Avri Altman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ram Kumar Dwivedi , Zhaoming Luo , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list References: <20260501134418.863432-1-can.guo@oss.qualcomm.com> <20260501134418.863432-2-can.guo@oss.qualcomm.com> <20260501-exhale-nutshell-3d80a8a2d791@spud> Content-Language: en-US From: Can Guo In-Reply-To: <20260501-exhale-nutshell-3d80a8a2d791@spud> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: LefEShzC7231K_uv76BSEsa65xpXu8MX X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTAyMDA5MyBTYWx0ZWRfX42BbH03SC9s9 QaWP+XNC4d/+Eow81FQARwXNcu1dTphqpIfMpGv4Wxo7f+fIP33kKjMyvIVYm2U67vsLAPEjKzW O7evjZ1daVjsdw29v2TIA/a424Lh8Baxnwt5VtHZtDuYhkUhtjRp298mNeHqtO4XlqHCMQlSFjo +BJerJhNRFzDiJImVtzI6zxHkGWQMc6sscxkFTTvlP+TLMPrKrRzUaKdgbLKPNLEh3XpqDOA7MV M96tm8pZ8OQeLNmZ019NHHU6KPhTR44jmAqdszA3wTJqStKxHESjNIC3U7Q/frWt6bS8C8y8goV sJ19n5BAfGBrTG/JRstZ+GXrP+lt5v0qKpzNBR+PsnsGGKA85WvP3hP//1uirwTZ6R+TvgZnBOk ECCj0i4VN9Yx325sirNKJJPncqnlcgQ3XdyizkkzJoFloU+L1t3ftU23vQWWtu/b66C435EIx0e gwJ9FvbAz47XYP9ZWJw== X-Authority-Analysis: v=2.4 cv=csirVV4i c=1 sm=1 tr=0 ts=69f5c457 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=YMgV9FUhrdKAYTUUvYB2:22 a=EUspDBNiAAAA:8 a=AGT6lJmRVMNxosRiLtkA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-ORIG-GUID: LefEShzC7231K_uv76BSEsa65xpXu8MX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-02_02,2026-04-30_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 phishscore=0 bulkscore=0 impostorscore=0 suspectscore=0 adultscore=0 malwarescore=0 spamscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605020093 Hi Conor, On 5/2/2026 1:02 AM, Conor Dooley wrote: > On Fri, May 01, 2026 at 06:44:17AM -0700, Can Guo wrote: >> HW design team usually provides static TX Equalization settings based on >> PCB board characteristics. These settings can be passed from the device >> tree to configure the TX Equalization parameters (PreShoot, DeEmphasis, >> and PreCodeEn) for Host and Device across different HS gears. > I'm not familiar enough with ufs stuff to tell, but this commit message > sounds very qcom specific, but this is being added to a common file. > I'd like to see a lot more detail in the commit message, detailing why > this is truly applicable across IP vendors. Thanks for raising this point. I agree the current commit message is too narrow and I will fix it in the next version. This binding is intended to be vendor-neutral. The DT properties describe board-level SI characterization data (per-gear/per-lane TX EQ values), not Qualcomm-specific controller internals. The tuple (PreShoot, DeEmphasis, PreCodeEn) is defined by the UFS link specs (MIPI UniPro ver 3.0 & M-PHY ver 6.0), so the representation is generic and applicable to any UFS host that supports TX EQ. This is also consistent with existing kernel practice in PCIe, where board-provided Equalization data is parsed from DT (see `of_pci_get_equalization_presets()` in `drivers/pci/of.c`). I will update the commit message to explicitly describe this cross-vendor scope and to clarify precedence: when adaptive TX EQ is enabled, DT static settings are fallback values and can be overridden by retrieved/trained TX EQ settings. Thanks, Can Guo. > >> Add patternProperties for txeq-settings-g[1-6] to support specifying >> static TX Equalization settings. >> >> Signed-off-by: Can Guo >> --- >> Documentation/devicetree/bindings/ufs/ufs-common.yaml | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/ufs/ufs-common.yaml b/Documentation/devicetree/bindings/ufs/ufs-common.yaml >> index ed97f5682509..bc83948fc168 100644 >> --- a/Documentation/devicetree/bindings/ufs/ufs-common.yaml >> +++ b/Documentation/devicetree/bindings/ufs/ufs-common.yaml >> @@ -105,6 +105,17 @@ properties: >> Restricts the UFS controller to rate-a or rate-b for both TX and >> RX directions. >> >> +patternProperties: >> + "^txeq-settings-g[1-6]$": >> + $ref: /schemas/types.yaml#/definitions/uint32-array >> + minItems: 6 >> + maxItems: 12 >> + description: | >> + Static TX Equalization settings for High Speed (HS) gears. >> + The settings are specified as an array of tuples (PreShoot, DeEmphasis, PrecodeEn). >> + The array must contain these tuples in the following order: >> + Host Lane 0, [Host Lane 1], Device Lane 0, [Device Lane 1]. >> + >> dependencies: >> freq-table-hz: [ clocks ] >> operating-points-v2: [ clocks, clock-names ] >> -- >> 2.34.1 >>