From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Luca Weiss <luca.weiss@fairphone.com>,
Georgi Djakov <djakov@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>
Cc: ~postmarketos/upstreaming@lists.sr.ht,
phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-pm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] interconnect: qcom: Add SM7635 interconnect provider driver
Date: Fri, 27 Jun 2025 14:48:17 +0200 [thread overview]
Message-ID: <3f8bcecb-4c5e-48b1-98be-96f3c0c8329e@oss.qualcomm.com> (raw)
In-Reply-To: <20250625-sm7635-icc-v1-2-8b49200416b0@fairphone.com>
On 6/25/25 11:13 AM, Luca Weiss wrote:
> Add driver for the Qualcomm interconnect buses found in SM7635 based
> platforms. The topology consists of several NoCs that are controlled by
> a remote processor that collects the aggregated bandwidth for each
> master-slave pairs.
>
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
> ---
[...]
> +static const struct of_device_id qnoc_of_match[] = {
> + { .compatible = "qcom,sm7635-aggre1-noc",
> + .data = &sm7635_aggre1_noc},
> + { .compatible = "qcom,sm7635-aggre2-noc",
> + .data = &sm7635_aggre2_noc},
> + { .compatible = "qcom,sm7635-clk-virt",
> + .data = &sm7635_clk_virt},
> + { .compatible = "qcom,sm7635-cnoc-cfg",
> + .data = &sm7635_cnoc_cfg},
> + { .compatible = "qcom,sm7635-cnoc-main",
> + .data = &sm7635_cnoc_main},
> + { .compatible = "qcom,sm7635-gem-noc",
> + .data = &sm7635_gem_noc},
> + { .compatible = "qcom,sm7635-lpass-ag-noc",
> + .data = &sm7635_lpass_ag_noc},
> + { .compatible = "qcom,sm7635-mc-virt",
> + .data = &sm7635_mc_virt},
> + { .compatible = "qcom,sm7635-mmss-noc",
> + .data = &sm7635_mmss_noc},
> + { .compatible = "qcom,sm7635-nsp-noc",
> + .data = &sm7635_nsp_noc},
> + { .compatible = "qcom,sm7635-pcie-anoc",
> + .data = &sm7635_pcie_anoc},
> + { .compatible = "qcom,sm7635-system-noc",
> + .data = &sm7635_system_noc},
One line per entry, please
In addition to what Dmitry asked for, please also look into porting
QoS settings - those will require additional clock references in the ICC
nodes and as such, the bindings will be altered (which we'd prefer to get
right from the getgo).
As far as testing goes, there may not be any apparent perf changes, but
if you get the clocks list wrong, the device will lock up at boot (unless
you're booting with clk_ignore_unused and friends)
Konrad
next prev parent reply other threads:[~2025-06-27 12:48 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-25 9:13 [PATCH 0/2] Add interconnect driver for SM7635 Luca Weiss
2025-06-25 9:13 ` [PATCH 1/2] dt-bindings: interconnect: document the RPMh Network-On-Chip Interconnect in Qualcomm SM7635 SoC Luca Weiss
2025-06-25 12:24 ` Rob Herring (Arm)
2025-06-25 15:04 ` Rob Herring
2025-06-25 9:13 ` [PATCH 2/2] interconnect: qcom: Add SM7635 interconnect provider driver Luca Weiss
2025-06-27 1:28 ` Dmitry Baryshkov
2025-06-27 12:48 ` Konrad Dybcio [this message]
2025-07-08 10:28 ` Luca Weiss
2025-07-08 11:31 ` Konrad Dybcio
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