Re: [powerpc-next] Fix powerpc64 alignment of .toc section in kernel modules

[Michael Ellerman <patch-notifications@ellerman.id.au>]

On Wed, 2017-12-06 at 19:12:28 UTC, Desnes Augusto Nunes do Rosario wrote:
> powerpc64 gcc can generate code that offsets an address, to access part of
> an object in memory. If the address is a -mcmodel=medium toc pointer
> relative address then code like the following is possible.
> 
>  addis r9,r2,var@toc@ha
>  ld r3,var@toc@l(r9)
>  ld r4,(var+8)@toc@l(r9)
> 
> This works fine so long as var is naturally aligned, *and* r2 is
> sufficiently aligned. If not, there is a possibility that the offset added
> to access var+8 wraps over a n*64k+32k boundary. Modules don't have any
> guarantee that r2 is sufficiently aligned. Moreover, code generated by
> older compilers generates a .toc section with 2**0 alignment, which can
> result in relocation failures at module load time even without the wrap
> problem.
> 
> Thus, this patch links modules with an aligned .toc section (Makefile and
> module.lds changes), and forces alignment for out of tree modules or those
> without a .toc section (module_64.c changes).
> 
> Signed-off-by: Alan Modra <amodra@gmail.com>
> [ desnesn: updated patch to apply to powerpc-next kernel v4.15 ]
> Signed-off-by: Desnes A. Nunes do Rosario <desnesn@linux.vnet.ibm.com>

Applied to powerpc next, thanks.

https://git.kernel.org/powerpc/c/5c45b5280196a92c4437f5648209c5

cheers