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[109.73.99.134]) by smtp.gmail.com with ESMTPSA id be19-20020a056512251300b00492edc64d08sm795273lfb.32.2022.08.30.02.53.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 Aug 2022 02:53:40 -0700 (PDT) Message-ID: <4001e0eb-f370-7bf4-89d0-ceed6d22e492@linaro.org> Date: Tue, 30 Aug 2022 12:53:39 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [PATCH 2/4] dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM62A Content-Language: en-US To: Vignesh Raghavendra , Nishanth Menon , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Linus Walleij Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org, Bryan Brattlof References: <20220829082200.241653-1-vigneshr@ti.com> <20220829082200.241653-3-vigneshr@ti.com> From: Krzysztof Kozlowski In-Reply-To: <20220829082200.241653-3-vigneshr@ti.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 29/08/2022 11:21, Vignesh Raghavendra wrote: > Add pinctrl macros for AM62AX SoCs. These macro definitions are similar > to that of previous platforms, but adding new definitions to avoid any > naming confusions in the SoC dts files. > > checkpatch insists the following error exists: > ERROR: Macros with complex values should be enclosed in parentheses > > However, we do not need parentheses enclosing the values for this > macro as we do intend it to generate two separate values as has been > done for other similar platforms. > > Signed-off-by: Vignesh Raghavendra > --- > include/dt-bindings/pinctrl/k3.h | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/include/dt-bindings/pinctrl/k3.h b/include/dt-bindings/pinctrl/k3.h > index a5204ab91d3e..97cd2e39efa4 100644 > --- a/include/dt-bindings/pinctrl/k3.h > +++ b/include/dt-bindings/pinctrl/k3.h > @@ -44,4 +44,6 @@ > #define AM62X_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) > #define AM62X_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) > > +#define AM62AX_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) > +#define AM62AX_MCU_IOPAD(pa, val, muxmode) (((pa) & 0x1fff)) ((val) | (muxmode)) Alphabetical order, so maybe before AM642? Acked-by: Krzysztof Kozlowski Best regards, Krzysztof