Jamie Lokier wrote:

> Coywolf Qi Hunt wrote:
> 
>>>(the jump and indirect branch aren't guaranteed to have the
>>>proper effects, although technically neither should be required due to
>>>the %cr0 write):

???

>>
>>
>>IMHO, why bother to re-reload %cs again?
>>
>>In setup.S, %cs is reloaded already. The enable paging code maps the
>>address identically, so %cs already contains the proper selector.
> 
> 
> It's to flush the instruction prefetch queue: that's one of the side
> effects of ljmp.

Re-loading %cs and flushing prefetch queue are two different things.

> 
> I recall an Intel manual that said ljmp is required when switching
> between real and protected modes, to flush the prefetch queue.

Not necessarily ljmp, imho

> 
> Unfortunately I don't remember what that manual said about just setting PG.
> 
> I'd guess that current generation CPUs don't care about ljmp when
> changing modes, but older ones certainly do.
> 
> -- Jamie
> 

FYI, intel's example code located in STARTUP.ASM Listing arround line
180, chapter 9, IA-32 Intel Architecture Software Developer's Manual,
Volume 3: System Programming Guide



Please consider my patch for this issue.


	Coywolf



-- 
Coywolf Qi Hunt
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