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From: Kieran Bingham <kieran.bingham@ideasonboard.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>,
	Geert Uytterhoeven <geert+renesas@glider.be>,
	Magnus Damm <magnus.damm@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 1/3] arm64: dts: renesas: r8a779a0: Add DU support
Date: Thu, 23 Sep 2021 13:05:39 +0100	[thread overview]
Message-ID: <40831759-6827-ea6d-399e-7f27f3669013@ideasonboard.com> (raw)
In-Reply-To: <CAMuHMdUTYYoZawgMhpTr56v88-mrKWPpgMwC-9KPeYhS6R2AzQ@mail.gmail.com>

Hi Geert,

On 23/09/2021 08:00, Geert Uytterhoeven wrote:
> Hi Kieran,
> 
> On Thu, Sep 23, 2021 at 3:04 AM Kieran Bingham
> <kieran.bingham@ideasonboard.com> wrote:
>> From: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>> Provide the device nodes for the DU on the V3U platforms.
>>
>> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
>> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>> ---
>> v2
>>  - Use a single clock specification for the whole DU.
>>
>> v3:
>>  - Use 'du.0' clock name instead of 'du'
> 
> Thanks for the update!
> 
>> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
>> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
>> @@ -1251,6 +1251,36 @@ vspd1: vsp@fea28000 {
>>                         renesas,fcp = <&fcpvd1>;
>>                 };
>>
>> +               du: display@feb00000 {
>> +                       compatible = "renesas,du-r8a779a0";
>> +                       reg = <0 0xfeb00000 0 0x40000>;
>> +                       interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
>> +                                    <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
>> +                       clocks = <&cpg CPG_MOD 411>;
>> +                       clock-names = "du.0";
>> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
>> +                       resets = <&cpg 411>;
> 
> You missed reset-names.

Adding it in now.

Sorry I must get the dtchecks automated in my builds...

--
Kieran


> 
>> +                       vsps = <&vspd0 0>, <&vspd1 0>;
>> +                       status = "disabled";
>> +
>> +                       ports {
>> +                               #address-cells = <1>;
>> +                               #size-cells = <0>;
>> +
>> +                               port@0 {
>> +                                       reg = <0>;
>> +                                       du_out_dsi0: endpoint {
>> +                                       };
>> +                               };
>> +
>> +                               port@1 {
>> +                                       reg = <1>;
>> +                                       du_out_dsi1: endpoint {
>> +                                       };
>> +                               };
>> +                       };
>> +               };
>> +
>>                 prr: chipid@fff00044 {
>>                         compatible = "renesas,prr";
>>                         reg = <0 0xfff00044 0 4>;
> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 

  reply	other threads:[~2021-09-23 12:06 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <20210923010402.3418555-1-kieran.bingham@ideasonboard.com>
2021-09-23  1:04 ` Kieran Bingham
2021-09-23  7:00   ` Geert Uytterhoeven
2021-09-23 12:05     ` Kieran Bingham [this message]
2021-09-24 14:22       ` Kieran Bingham
2021-09-24 14:23   ` [PATCH v3.1 " Kieran Bingham
2021-09-23  1:04 ` [PATCH v3 2/3] arm64: dts: renesas: r8a779a0: Add DSI encoders Kieran Bingham
2021-09-23  1:10   ` Laurent Pinchart
2021-09-23  1:04 ` [PATCH v3 3/3] arm64: dts: renesas: r8a779a0: falcon-cpu: Add DSI display output Kieran Bingham

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