So, finally ATA has joined modern times.  People familiar with ATA know 
the host controller interfaces have always been slow, often requiring 8+ 
io writes per command.  The SCSI and ethernet controller folks have been 
rolling their eyes for years.

The current wave of SATA controllers make a big leap... into the 
present.  Either DMA rings or queues of depths ~32 are becoming the 
norm.  All very hotplug-friendly, with highly optimized fast paths.

Of course, as is the unfortunate norm in the storage industry, all of 
these are covered by NDAs, except for Intel's ICH6, which conforms the 
to the fully-open AHCI specification.  In order to support such a 
controller, all you need are PCI ids, and the following specifications:

AHCI: http://www.intel.com/technology/serialata/pdf/rev1_0.pdf
SATA 1: http://www.serialata.org/collateral/zipdownloads/serialata10a.ZIP
SATA 2: http://www.serialata.org/collateral/pdf/S2Ext_1_1_Gold.pdf
ATA: http://www.t13.org/docs2004/d1532v$Vr4b ATA-ATAPI-7.pdf
	where "$V" == 1 or 2 or 3

In addition to being an open architecture, it has all the things you 
would expect of a modern controller:  64-bit DMA support everywhere (no 
bank switching), queueing support, trivial PIO and ATAPI support, access 
to the low-level SATA FIS, and more.

So kudos to the AHCI folks (mainly at Intel), for making a decent, open 
controller.  I always prefer to work on drivers for decent hardware, 
whose hardware specification is open and public.