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Received: from MRWPR04MB12117.eurprd04.prod.outlook.com (2603:10a6:501:97::14) by GV1PR04MB9515.eurprd04.prod.outlook.com (2603:10a6:150:24::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9499.7; Tue, 13 Jan 2026 08:16:08 +0000 Received: from MRWPR04MB12117.eurprd04.prod.outlook.com ([fe80::9a10:5b39:708:7f43]) by MRWPR04MB12117.eurprd04.prod.outlook.com ([fe80::9a10:5b39:708:7f43%6]) with mapi id 15.20.9499.005; Tue, 13 Jan 2026 08:16:08 +0000 Message-ID: <409cdcf0-af9b-4084-845f-d863ad6303c5@nxp.com> Date: Tue, 13 Jan 2026 16:15:57 +0800 User-Agent: Mozilla Thunderbird Subject: Re: [EXT] [PATCH 2/2] drm/bridge: waveshare-dsi: Add support for 1..4 DSI data lanes To: Marek Vasut , dri-devel@lists.freedesktop.org Cc: Andrzej Hajda , Conor Dooley , David Airlie , Jernej Skrabec , Jonas Karlman , Krzysztof Kozlowski , Laurent Pinchart , Maarten Lankhorst , Maxime Ripard , Neil Armstrong , Rob Herring , Robert Foss , Simona Vetter , Thomas Zimmermann , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org References: <20260112234834.226128-1-marek.vasut+renesas@mailbox.org> <20260112234834.226128-2-marek.vasut+renesas@mailbox.org> <773b6e43-4f86-4b11-8e6b-a9f2561a75de@nxp.com> <65ccfeb6-4962-4964-be1d-cfb0ed41773e@mailbox.org> Content-Language: en-US From: Joseph Guo In-Reply-To: <65ccfeb6-4962-4964-be1d-cfb0ed41773e@mailbox.org> Content-Type: text/plain; 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Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ] > > Caution: This is an external email. Please take care when clicking links or opening attachments. When in doubt, report the message using the 'Report this email' button > > > On 1/13/26 7:41 AM, Joseph Guo wrote: >> On 1/13/2026 7:47 AM, Marek Vasut wrote: >>> [You don't often get email from marek.vasut+renesas@mailbox.org. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ] >>> >>> Caution: This is an external email. Please take care when clicking links or opening attachments. When in doubt, report the message using the 'Report this email' button >>> >>> >>> Parse the data lane count out of DT. Limit the supported data lanes >>> to 1..4 which is the maximum available DSI pairs on the connector of >>> any known panels which may use this bridge. Internally, this bridge >>> is an ChipOne ICN6211 which loads its register configuration from a >>> dedicated storage and its I2C does not seem to be accessible. The >>> ICN6211 also supports up to 4 DSI lanes, so this is a hard limit. >>> >>> To avoid any breakage on old DTs where the parsing of data lanes from >>> DT may fail, fall back to the original hard-coded value of 2 lanes and >>> warn user. >>> >>> The lane configuration is preconfigured in the bridge for each of the >>> WaveShare panels. The 13.3" DSI panel works with 4-lane configuration, >>> others seem to use 2-lane configuration. This is a hardware property, >>> so the actual count should come from DT. >>> >>> >> Hi Marek, >> >> I don't have 4 lanes waveshare panel on my hands. Have you tested with the 4-lane panel already? > Yes, the 13.3" DSI panel is 4-lane > https://www.waveshare.com/13.3inch-dsi-lcd.htm, I have it connected to > Retronix Sparrow Hawk board which has 4-lane port. > > See also this patch I submitted, that is the DT binding for it: > > [PATCH 2/2] arm64: dts: renesas: sparrow-hawk: Add overlay for WaveShare > Display 13.3" OK, thank you. Reviewed-by: Joseph Guo Regards, Joseph