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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5d14b609e56sm11386055a12.40.2024.12.13.04.24.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 13 Dec 2024 04:24:26 -0800 (PST) Message-ID: <40bdbb34-94a5-4500-a660-57a530f066c8@oss.qualcomm.com> Date: Fri, 13 Dec 2024 13:24:24 +0100 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] soc: qcom: llcc: Enable LLCC_WRCACHE at boot on X1 To: Johan Hovold , Konrad Dybcio Cc: Bjorn Andersson , Sibi Sankar , Bryan O'Donoghue , Rajendra Nayak , Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio , stable@vger.kernel.org References: <20241212-topic-llcc_x1e_wrcache-v2-1-e44d3058d06c@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: WvQmUiFjzn4s0Xm3sXjtgwRBf2WDnvnD X-Proofpoint-GUID: WvQmUiFjzn4s0Xm3sXjtgwRBf2WDnvnD X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 malwarescore=0 priorityscore=1501 spamscore=0 mlxlogscore=999 impostorscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0 adultscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2412130087 On 13.12.2024 9:42 AM, Johan Hovold wrote: > On Thu, Dec 12, 2024 at 05:32:24PM +0100, Konrad Dybcio wrote: >> From: Konrad Dybcio >> >> Do so in accordance with the internal recommendations. > > Your commit message is still incomplete as it does not really say > anything about what this patch does, why this is needed or what the > implications are if not merging this patch. I'm not sure I can say much more here.. > How would one determine that this patch is a valid candidate for > backporting, for example. "suboptimal hw presets" > >> Fixes: b3cf69a43502 ("soc: qcom: llcc: Add configuration data for X1E80100") >> Cc: stable@vger.kernel.org >> Reviewed-by: Rajendra Nayak >> Signed-off-by: Konrad Dybcio >> --- >> Changes in v2: >> - Cc stable >> - Add more context lines >> - Pick up r-b >> - Link to v1: https://lore.kernel.org/r/20241207-topic-llcc_x1e_wrcache-v1-1-232e6aff49e4@oss.qualcomm.com >> --- >> drivers/soc/qcom/llcc-qcom.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c >> index 32c3bc887cefb87c296e3ba67a730c87fa2fa346..1560db00a01248197e5c2936e785a5ea77f74ad8 100644 >> --- a/drivers/soc/qcom/llcc-qcom.c >> +++ b/drivers/soc/qcom/llcc-qcom.c >> @@ -2997,20 +2997,21 @@ static const struct llcc_slice_config x1e80100_data[] = { >> .bonus_ways = 0xfff, >> .cache_mode = 0, >> }, { >> .usecase_id = LLCC_WRCACHE, >> .slice_id = 31, >> .max_cap = 1024, >> .priority = 1, >> .fixed_size = true, >> .bonus_ways = 0xfff, >> .cache_mode = 0, >> + .activate_on_init = true, > > If this is so obviously correct, why isn't this flag set for > LLCC_WRCACHE for all the SoCs? The other SoCs where it's disabled (8180 and 8150) have it in line with the recommendations. Konrad