From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
Cc: konradybcio@kernel.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, linux-arm-msm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
quic_srichara@quicinc.com, quic_varada@quicinc.com
Subject: Re: [PATCH v5 1/2] arm64: dts: qcom: ipq5424: Add PCIe PHYs and controller nodes
Date: Sat, 15 Mar 2025 14:32:55 +0100 [thread overview]
Message-ID: <40f26e69-c3a3-4bc0-9207-9d51126a8a47@oss.qualcomm.com> (raw)
In-Reply-To: <vfwoxjrfhakkkunl4wktn4muzj46vunjzc75j7zeu4wvpwbkkg@sh6d7zlp52ea>
On 3/14/25 5:57 PM, Bjorn Andersson wrote:
> On Thu, Mar 06, 2025 at 04:46:09PM +0530, Manikanta Mylavarapu wrote:
>> Add PCIe0, PCIe1, PCIe2, PCIe3 (and corresponding PHY) devices
>> found on IPQ5424 platform. The PCIe0 & PCIe1 are 1-lane Gen3
>> host whereas PCIe2 & PCIe3 are 2-lane Gen3 host.
>>
>> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
>
> When validating this against linux-next DT bindings I get:
>
> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dtb: pcie@f8000: reg: [[0, 1015808, 0, 12288], [0, 1073741824, 0, 3868], [0, 1073745696, 0, 168], [0, 1073745920, 0, 4096], [0, 1074790400, 0, 4096], [0, 1040384, 0, 4096]] is too long
> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dtb: pcie@f8000: reg-names:0: 'dbi' was expected
> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dtb: pcie@f8000: reg-names:1: 'elbi' was expected
> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dtb: pcie@f8000: reg-names:2: 'atu' was expected
> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dtb: pcie@f8000: reg-names:3: 'parf' was expected
> arch/arm64/boot/dts/qcom/ipq5424-rdp466.dtb: pcie@f8000: reg-names: ['parf', 'dbi', 'elbi', 'atu', 'config', 'mhi'] is too long
>
> Are we still missing something?
Yes.
There's a dt-bindings mess regarding a number of similar ipq platforms
that has been impacted by a recent round of reviews that resulted in
reverts.
The merged bindings for this platform were created based on ipq9574,
which used some crazy order for reg entries (i.e. PARF not being first).
That went unnoticed for a couple of them and when one of the ipq
platforms patches were under review, the sender was asked to align with
the other qc platforms. Then, a series changing existing bindings with
users was submitted, which was partially merged (and then subsequently
reverted), so some patches are based on that, while others are based on
the state of -next.
Now this v4 puts parf as the first region, but the v1 bindings were
merged a couple months ago, before the discrepancy was discussed.
Konrad
next prev parent reply other threads:[~2025-03-15 13:33 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-06 11:16 [PATCH v5 0/2] Add PCIe support for IPQ5424 Manikanta Mylavarapu
2025-03-06 11:16 ` [PATCH v5 1/2] arm64: dts: qcom: ipq5424: Add PCIe PHYs and controller nodes Manikanta Mylavarapu
2025-03-14 16:57 ` Bjorn Andersson
2025-03-15 13:32 ` Konrad Dybcio [this message]
2025-03-06 11:16 ` [PATCH v5 2/2] arm64: dts: qcom: ipq5424: Enable PCIe PHYs and controllers Manikanta Mylavarapu
2025-05-20 2:14 ` [PATCH v5 0/2] Add PCIe support for IPQ5424 Bjorn Andersson
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