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([2a02:810d:15c0:828:bcb8:77e6:8f45:4771]) by smtp.gmail.com with ESMTPSA id v5-20020a056402184500b0050687f06aacsm861574edy.12.2023.04.20.08.46.02 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 20 Apr 2023 08:46:02 -0700 (PDT) Message-ID: <4127a3d7-f65e-7d9c-86ea-e2e9754201aa@linaro.org> Date: Thu, 20 Apr 2023 17:46:01 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v3 1/2] dt-bindings: clock: Add SM8350 VIDEOCC Content-Language: en-US To: Konrad Dybcio , Bjorn Andersson , Andy Gross , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Philipp Zabel , Taniya Das Cc: Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230413-topic-lahaina_vidcc-v3-0-0e404765f945@linaro.org> <20230413-topic-lahaina_vidcc-v3-1-0e404765f945@linaro.org> From: Krzysztof Kozlowski In-Reply-To: <20230413-topic-lahaina_vidcc-v3-1-0e404765f945@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 19/04/2023 14:53, Konrad Dybcio wrote: > SM8350, like most recent higher-end chips has a separate clock > controller block just for the Venus IP. Document it. > > The binding was separated as the driver, unlike the earlier ones, doesn't > expect clock-names to keep it easier to maintain. > > Signed-off-by: Konrad Dybcio > --- > .../bindings/clock/qcom,sm8350-videocc.yaml | 81 ++++++++++++++++++++++ > include/dt-bindings/clock/qcom,sm8350-videocc.h | 35 ++++++++++ > include/dt-bindings/reset/qcom,sm8350-videocc.h | 18 +++++ > 3 files changed, 134 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml > new file mode 100644 > index 000000000000..28a1002b1563 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml > @@ -0,0 +1,81 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sm8350-videocc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm SM8350 Video Clock & Reset Controller > + > +maintainers: > + - Konrad Dybcio > + > +description: | > + Qualcomm video clock control module provides the clocks, resets and power > + domains on Qualcomm SoCs. > + > + See also:: > + include/dt-bindings/clock/qcom,videocc-sm8350.h > + include/dt-bindings/reset/qcom,videocc-sm8350.h > + > +properties: > + compatible: > + const: qcom,sm8350-videocc > + > + reg: > + maxItems: 1 > + > + clocks: > + items: > + - description: Board XO source > + - description: Board active XO source > + - description: Board sleep clock > + > + power-domains: > + description: > + A phandle and PM domain specifier for the MMCX power domain. > + maxItems: 1 > + > + required-opps: > + description: > + A phandle to an OPP node describing required MMCX performance point. > + maxItems: 1 > + > + '#clock-cells': > + const: 1 > + > + '#reset-cells': > + const: 1 > + > + '#power-domain-cells': > + const: 1 Everything is the same as gcc.yaml, so add a allOf:$ref to it, drop unnecessary properties and use unevaluatedProperties: false. Best regards, Krzysztof