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h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=u/tLA5HCY9Zbsy0yp4pZTGSsaKouYaZM5qAu0ws5DCDTFyI1zEqyZm/jRXip6PbBW 71gb+Jg514MjrdsqI9gvJCXqvCrr+yo4VqeX40X3kSE329g7M9b/3+2RZrmO/84skw BPU2i2kQHf4m648Q47ZnBB8AtIqXRw40+Ck7+XH8/lmagHSCdIAjbttkY3GkHQPnQo DUmrfAYsTsavDtzd7nS119gwNCQCsCw/EXz9J3V4iRRMhpornS8HAA5YbjPCEo/lTY ai7LSs+PjeiIciDz8B4OZO7VSLaXYGdNZ+rSr6LotQm+eIO4T1ghj18IHOMFFFFosJ wiVYH6/ESpJbQ== Message-ID: <4133bdb5-be2c-4594-aba2-511cecb5a343@zytor.com> Date: Fri, 1 Aug 2025 09:11:33 -0700 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 4/4] KVM: x86: Advertise support for the immediate form of MSR instructions To: Sean Christopherson Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, pbonzini@redhat.com, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, chao.gao@intel.com References: <20250730174605.1614792-1-xin@zytor.com> <20250730174605.1614792-5-xin@zytor.com> Content-Language: en-US From: Xin Li Autocrypt: addr=xin@zytor.com; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit On 8/1/2025 7:39 AM, Sean Christopherson wrote: > On Wed, Jul 30, 2025, Xin Li (Intel) wrote: >> Advertise support for the immediate form of MSR instructions to userspace >> if the instructions are supported by the underlying CPU. > > SVM needs to explicitly clear the capability so that KVM doesn't over-advertise > support if AMD ever implements X86_FEATURE_MSR_IMM. > > diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c > index ca550c4fa174..7e7821ee8ee1 100644 > --- a/arch/x86/kvm/svm/svm.c > +++ b/arch/x86/kvm/svm/svm.c > @@ -5311,8 +5311,12 @@ static __init void svm_set_cpu_caps(void) > /* CPUID 0x8000001F (SME/SEV features) */ > sev_set_cpu_caps(); > > - /* Don't advertise Bus Lock Detect to guest if SVM support is absent */ > + /* > + * Clear capabilities that are automatically configured by common code, > + * but that require explicit SVM support (that isn't yet implemented). > + */ > kvm_cpu_cap_clear(X86_FEATURE_BUS_LOCK_DETECT); > + kvm_cpu_cap_clear(X86_FEATURE_MSR_IMM); > } > > static __init int svm_hardware_setup(void) > Nice catch! Yes, a feature needing explicit enabling effort can't be blindly advertised until the support on all sub-arch is ready. I.e., I need to disable it on non-Intel CPUs because it's only done for Intel.