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[2001:14ba:a085:4d00::8a5]) by smtp.gmail.com with ESMTPSA id d18-20020a170906c21200b0084ce5d5d21bsm8023220ejz.22.2023.01.31.01.05.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 31 Jan 2023 01:05:26 -0800 (PST) Message-ID: <4148b98c-8cee-83c5-7212-06326f086f2a@linaro.org> Date: Tue, 31 Jan 2023 11:05:25 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH v4 1/8] clk: qcom: branch: Add helper functions for setting retain bits Content-Language: en-GB To: Konrad Dybcio , linux-arm-msm@vger.kernel.org, andersson@kernel.org, agross@kernel.org, krzysztof.kozlowski@linaro.org Cc: marijn.suijten@somainline.org, Michael Turquette , Stephen Boyd , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230130235926.2419776-1-konrad.dybcio@linaro.org> <20230130235926.2419776-2-konrad.dybcio@linaro.org> From: Dmitry Baryshkov In-Reply-To: <20230130235926.2419776-2-konrad.dybcio@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 31/01/2023 01:59, Konrad Dybcio wrote: > Most Qualcomm branch clocks come with a pretty usual set of bits that > can enable memory retention by means of not turning off parts of the > memory logic. Add them to the common header file and introduce helper > functions for setting them instead of using magic writes. > > Signed-off-by: Konrad Dybcio > --- > drivers/clk/qcom/clk-branch.h | 23 +++++++++++++++++++++++ > 1 file changed, 23 insertions(+) > > diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h > index 17a58119165e..d8fc7b93ef6d 100644 > --- a/drivers/clk/qcom/clk-branch.h > +++ b/drivers/clk/qcom/clk-branch.h > @@ -37,6 +37,29 @@ struct clk_branch { > struct clk_regmap clkr; > }; > > +/* Branch clock common bits for HLOS-owned clocks */ > +#define CBCR_FORCE_MEM_CORE_ON BIT(14) > +#define CBCR_FORCE_MEM_PERIPH_ON BIT(13) > +#define CBCR_FORCE_MEM_PERIPH_OFF BIT(12) It might be a slight bit of pain, but I'd suggest moving these definitions next to BRANCH_CLK_OFF since they are using the same reg. (And while you are at it also reworking BRANCH_NOC_FSM_STATUS into a proper mask and FIELD_* macros.) > + > +static inline void qcom_branch_set_force_mem_core(struct regmap *regmap, u32 reg, bool on) These functions can be more descriptive if they receive struct clk_branch as an argument instead of just a register. > +{ > + regmap_update_bits(regmap, reg, CBCR_FORCE_MEM_CORE_ON, > + on ? CBCR_FORCE_MEM_CORE_ON : 0); > +} > + > +static inline void qcom_branch_set_force_periph_on(struct regmap *regmap, u32 reg, bool on) > +{ > + regmap_update_bits(regmap, reg, CBCR_FORCE_MEM_PERIPH_ON, > + on ? CBCR_FORCE_MEM_PERIPH_ON : 0); > +} > + > +static inline void qcom_branch_set_force_periph_off(struct regmap *regmap, u32 reg, bool on) > +{ > + regmap_update_bits(regmap, reg, CBCR_FORCE_MEM_PERIPH_OFF, > + on ? CBCR_FORCE_MEM_PERIPH_OFF : 0); > +} > + > extern const struct clk_ops clk_branch_ops; > extern const struct clk_ops clk_branch2_ops; > extern const struct clk_ops clk_branch_simple_ops; -- With best wishes Dmitry