From: Kishon Vijay Abraham I <kishon@ti.com>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
Icenowy Zheng <icenowy@aosc.io>
Cc: Chen-Yu Tsai <wens@csie.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-sunxi@googlegroups.com>
Subject: Re: [PATCH 1/3] phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY
Date: Wed, 5 Apr 2017 15:29:00 +0530 [thread overview]
Message-ID: <41abab5b-1776-4cd4-f280-bfa7f69db9ad@ti.com> (raw)
In-Reply-To: <20170405070351.etpupeqjeo7dhyxl@lukather>
On Wednesday 05 April 2017 12:33 PM, Maxime Ripard wrote:
> On Wed, Apr 05, 2017 at 02:45:16AM +0800, Icenowy Zheng wrote:
>> Allwinner A64 SoC features a switchable PHY0 like the one in H3, which
>> can switch between a MUSB controller and a pair of OHCI/EHCI controller.
>>
>> Enable PHY0 route auto switching for A64.
>>
>> Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
>
> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
merged, thanks.
-Kishon
prev parent reply other threads:[~2017-04-05 10:01 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-04 18:45 Icenowy Zheng
2017-04-04 18:45 ` [PATCH 2/3] arm64: allwinner: a64: add USB0 OHCI/EHCI related devicetree parts Icenowy Zheng
2017-04-05 7:15 ` Maxime Ripard
[not found] ` <7828ffa0-f570-9841-a9e6-fe175f8169ac@aosc.io>
2017-04-05 7:26 ` Maxime Ripard
2017-04-05 7:33 ` Icenowy Zheng
2017-04-05 8:13 ` Maxime Ripard
2017-04-04 18:45 ` [PATCH 3/3] arm64: allwinner: a64: enable EHCI0/OHCI0 controller for Pine64 Icenowy Zheng
2017-04-05 7:03 ` [PATCH 1/3] phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY Maxime Ripard
2017-04-05 9:59 ` Kishon Vijay Abraham I [this message]
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